Semiconductor device and its manufacturing method

ABSTRACT

A semiconductor device including a semiconductor chip having connection terminals in a peripheral part of a main surface thereof; an elastic body disposed on the main surface leaving the connection terminals exposed; an insulating tape formed on the elastic body and having openings in areas where the connection terminals are situated; plural leads formed on the top surface of the insulating tape, one end of each lead being connected to one of the connection terminals and the other end being disposed on the elastic body; plural bump electrodes formed on the other ends of the plural leads; and a resin body for sealing the connection terminals and one end of each of the leads, wherein the insulating tape protrudes beyond the chip where the plural connection terminals are arranged, and wherein the shape of the resin body is restricted by the protruding part of the insulating tape.

[0001] This application is a divisional of U.S. application Ser. No.09/113,500, filed Jul. 10, 1998, the entire disclosure of which isincorporated herein by reference.

BACKGROUND OF THE INVENTION

[0002] This invention relates to a technique for manufacturing asemiconductor device, and in particular to a technique for manufacturinga lower cost semiconductor device with improved seal properties in a CSP(Chip Size Package).

[0003] This invention is the result of the inventor's own research ofwhich a summary follows.

[0004] A CSP is a thin, compact semiconductor device of chip size, andit is often used in printed circuit boards built into portableelectronic devices.

[0005] The general structure of a CSP comprises a thin film wiringsubstrate on which are mounted bump electrodes which are externalterminals, leads electrically connected to electrode pads of asemiconductor chip, an elastomer (elastic structure) arranged betweenthe semiconductor chip and the thin film wiring substrate and formed inapproximately the same size as the thin film wiring substrate, andsealing parts which seal the electrode pads and the leads of the thinfilm wiring substrate connected to it.

[0006] Structures of CSP studied by the inventor for comparison purposesare described for example in “Nikkei Microdevices” Apr. 1, 1997, No.142, pp. 44-53, published by Nikkei BP Co. on Apr. 1, 1997, and inparticular, next generation CSP (comparison examples) described in FIG.6 on page 48.

[0007] This CSP comprises a semiconductor chip having electrode padsformed on its main surface, bump electrodes which are external terminalsarranged inside the semiconductor chip, and a contour ring outside thesemiconductor chip.

SUMMARY OF THE INVENTION

[0008] However, in a CSP having the aforesaid general structureaccording to the prior art, a sealing resin easily flows onto the sidesof the semiconductor chip. This impairs the precision of the contoursize of the CSP so that, in some cases, it could not be inserted in itssocket.

[0009] In other words, there was a problem in that the contour shape ofthe CSP was not fixed.

[0010] If the amount of sealing resin is reduced in an attempt to solvethis problem, the leads of the thin film wiring substrate may beexposed. The sealing properties of the sealing parts are theninadequate, and humidity resistance is not so reliable as a result.

[0011] In this comparison CSP of the prior art, if the contour ring ismade a separate structure, manufacturing costs increase.

[0012] In a CSP having the usual structure, during solder reflow informing the bump electrodes, the internal pressure rises due toexpansion of moisture and gas in the elastomer, and as a result, theseal part is destroyed causing a “popcorn” phenomenon.

[0013] It is therefore an object of this invention to provide a chipsize semiconductor device of lower cost and improved sealing properties,and a method of manufacturing such a device.

[0014] It is a further object of this invention to provide asemiconductor device and manufacturing method which prevents occurrenceof this popcorn phenomenon.

[0015] This and other features of the invention will become clear fromthe following description and attached drawings.

[0016] The following is a simple description of the main points of atypical example of the present invention.

[0017] The semiconductor device of this invention is a chip size packagehaving connection terminals provided on the outer periphery of its mainsurface. The package comprises an elastic structure arranged on the mainsurface of the semiconductor chip leaving the connection terminalsexposed, a thin film wiring substrate comprising a substrate body havingwiring whereof one end is electrically connected to the aforesaidterminals via leads and the other ends are electrically connected tobump electrodes which are external terminals and comprising substrateprotruding parts having openings which leave the connection terminalsexposed and which protrude beyond the openings and the semiconductorchip, and sealing parts which seal the connection terminals of thesemiconductor chip and seal the leads of the thin film wiring substrate,the substrate body and the substrate protruding parts of the thin filmwiring substrate being formed in a one-piece construction.

[0018] As the substrate protruding parts are not separate from thesubstrate body but are formed together with it in a one-piececonstruction, the substrate protruding parts need not be formed fromcostly materials.

[0019] As a result, the cost of manufacturing the semiconductor deviceis reduced.

[0020] The semiconductor device of this invention is a chip sizestructure having connection terminals provided on the outer periphery ofits main surface. It comprises an elastic structure arranged on the mainsurface of the semiconductor chip comprising elastic protruding partshaving openings which leave the connection terminals exposed, a thinfilm wiring substrate comprising a substrate body having wiring whereofone end is electrically connected to the aforesaid terminals via leadsand the other ends are electrically connected to bump electrodes whichare external terminals, and comprising substrate protruding parts havingopenings which leave the connection-terminals exposed and which protrudebeyond the openings and the semiconductor chip, and sealing parts whichseal the connection terminals of the semiconductor chip and seal theleads of the thin film wiring substrcate, the substrate body and thesubstrate protruding parts of the thin film wiring substrate beingformed in a one-piece construction, and the thin film wiring substrateand the elastic structure having substantially the same size.

[0021] The semiconductor device of this invention is a chip sizestructure having connection terminals provided on the outer periphery ofits main surface, comprising an elastic structure arranged on the mainsurface of the semiconductor chip having parts exposed to the outsidefor exposing the connection terminals, a thin film wiring substratecomprising a substrate main body having wiring whereof one end iselectrically connected to the aforesaid connection terminals via leadsand the other ends are electrically connected to bump electrodes whichare external terminals, and comprising openings so as to expose theaforesaid connection terminals, and sealing parts which seal theconnection terminals of the semiconductor chip and seal the leads of thethin film wiring substrate.

[0022] The method of manufacturing a semiconductor device according tothis invention comprises a step for preparing a thin film wiringsubstrate which is a chip size structure having connection terminalsprovided on the outer periphery of its main surface, comprising asubstrate body with wiring, and comprising substrate protruding partswhich protrude beyond openings in which leads are connected to thiswiring and formed in a one-piece construction with the substrate body, astep for joining an elastic structure and the substrate body of the thinfilm wiring substrate, a step for joining the main surface of thesemiconductor chip and the elastic structure so as to expose theconnection terminals of the semiconductor chip in the openings of thethin film wiring substrate, a step for electrically connecting theconnection terminals of the semiconductor chip and the correspondingleads of the thin film wiring substrate, a step for sealing theconnection terminals of the semiconductor chip and the leads of the thinfilm wiring substrate using a sealing resin comprising a low silicamaterial so as to form sealing parts, a step for electrically connectingthe wiring of the substrate body so as to form bump electrodes, and astep for simultaneously cutting the substrate protruding parts andsealing parts formed therein to a desired contour size.

[0023] The method of manufacturing a semiconductor device according tothis invention comprises a step for preparing a thin film wiringsubstrate which is a chip size structure having connection terminalsprovided on the outer periphery of its main surface, comprising asubstrate main body having wiring joined to an elastic structure andopenings in which leads are connected to the wiring, wherein thesubstrate body is supported in a substrate frame by supporting parts ofthe elastic structure, a step for joining the main surface of thesemiconductor chip and the elastic structure so as to leave theconnection terminals of the semiconductor chip exposed in the openingsof the thin film wiring substrate, a step for electrically connectingthe connection terminals of the semiconductor chip and the correspondingleads of the thin film wiring substrate, a step for resin sealing theconnection terminals of the semiconductor chip and the leads of the thinfilm wiring substrate so as to form sealing parts, a step forelectrically connecting the wiring of the substrate body so as to formbump electrodes, a step for cutting the supporting part of the elasticstructure so as to separate the substrate body from the substrate frame,and a step for exposing the exposed parts of the elastic structure.

BRIEF DESCRIPTION OF THE DRAWINGS

[0024]FIG. 1 is a plan view through the sealing parts of a typicalstructure of a semiconductor device (CSP) according to a firstembodiment of this invention.

[0025] FIGS. 2(a) to 2(c) are diagrams showing the structure of thesemiconductor device shown in FIG. 1, in which FIG. 2(a) is across-sectional view through a line A-A in FIG. 1,

[0026]FIG. 2(b) is a cross-sectional view through a line B-B in FIG. 1,and FIG. 2(c) is a cross-sectional view through a line C-C in FIG. 1.

[0027] FIGS. 3(a,b,c,d) are specification tables showing examplespecifications of parts used in the semiconductor device shown in FIG.1.

[0028]FIG. 4 is a manufacturing sequence showing a typical process formanufacturing the semiconductor device shown in FIG. 1.

[0029]FIG. 5 is a chart showing typical processing conditions in eachstage of the production process shown in FIG. 4.

[0030] FIGS. 6(a), 6(b) are partial plan views showing a typical methodof manufacturing a thin film wiring substrate used for a semiconductordevice (CSP) according to the first embodiment of this invention.

[0031] FIGS. 7(a), 7(b) are partial plan views showing a typical methodof manufacturing a thin film wiring substrate used for a semiconductordevice (CSP) according to the first embodiment of this invention.

[0032] FIGS. 8(a), 8(b) are partial plan views showing a typical methodof manufacturing a thin film wiring substrate used for a semiconductordevice (CSP) according to the first embodiment of this invention.

[0033] FIGS. 9(a) and 9(b) are diagrams each showing a typical method ofmanufacturing the semiconductor device (CSP) according to the firstembodiment of this invention, in which FIG. 9(a) is a partial plan viewshowing an elastomer attachment, and FIG. 9(b) is a partial plan viewshowing a semiconductor chip attachment.

[0034]FIG. 10 is a partial plan view showing an example of a cuttingposition in a method of manufacturing a semiconductor device (CSP)according to the first embodiment of this invention.

[0035] FIGS. 11(a), 11(b) are perspective views showing an example of alead cutting method in a method of manufacturing the semiconductordevice (CSP) according to the first embodiment of this invention.

[0036] FIGS. 12(a), 12(b), 12(c) are perspective views showing anexample of an elastomer attachment state in a method of manufacturing asemiconductor device (CSP) according to the first embodiment of thisinvention.

[0037] FIGS. 13(a), 13(h) are perspective views showing an example of alead bonding method in a method of manufacturing a semiconductor device(CSP) according to the first embodiment of this invention.

[0038]FIG. 14 is a plan view showing an example of a structure of asemiconductor device (CSP) according to a second embodiment of thisinvention through the sealing parts.

[0039] FIGS. 15(a) to 15(c) are diagrams showing the structure of thesemiconductor device shown in FIG. 14, in which FIG. 15(a), is across-sectional view through a line A-A in FIG. 14,

[0040]FIG. 15(b) is a cross-sectional view through a line B-B in FIG.14, and

[0041]FIG. 15(c) is a cross-sectional view through a line C-C in FIG.14.

[0042]FIG. 16 is a plan view showing an example of a structure of asemiconductor device (CSP) according to a third embodiment of thisinvention through the sealing parts.

[0043] FIGS. 17(a) to 17(c) are diagrams showing the structure of thesemiconductor device shown in FIG. 16, in which FIG. 17(a) is across-sectional view through a line A-A in FIG. 16,

[0044]FIG. 17(b) is a cross-sectional view through a line B-B in FIG.16, and

[0045]FIG. 17(c) is a cross-sectional view through a line C-C in FIG.16.

[0046]FIG. 18 is a plan view showing an example of a structure of asemiconductor device (CSP) according to a fourth embodiment of thisinvention through the sealing parts.

[0047] FIGS. 19(a) to 19(c) are diagrams showing the structure of thesemiconductor device shown in FIG. 18, in which FIG. 19(a) is across-sectional view through a line A-A in FIG. 18,

[0048]FIG. 19(b) is a cross-sectional view through a line B-B in FIG.18, and

[0049]FIG. 19(c) is a cross-sectional view through a line C-C in FIG.18.

[0050]FIG. 20 is a plan view showing an example of a structure of asemiconductor device (CSP) according to a fifth embodiment of thisinvention through the sealing parts.

[0051] FIGS. 21(a) to 21(c) are diagrams showing the structure of thesemiconductor device shown in FIG. 20, in which FIG. 21(a) is across-sectional view through a line A-A in FIG. 20,

[0052]FIG. 21(b) is a cross-sectional view through a line B-B in FIG.20, and

[0053]FIG. 21(c) is a cross-sectional view through a line C-C in FIG.20.

[0054]FIG. 22 is a plan view showing an example of a structure of asemiconductor device (CSP) according to a sixth embodiment of thisinvention through the sealing parts.

[0055] FIGS. 23(a) to 23(c) are diagrams showing the structure of thesemiconductor device shown in FIG. 22, in which FIG. 23(a) is across-sectional view through a line A-A in FIG. 22,

[0056]FIG. 23(b) is a cross-sectional view through a line B-B in FIG.22, and

[0057]FIG. 23(c) is a cross-sectional view through a line C-C in FIG.22.

[0058]FIG. 24 is a plan view showing an example of a structure of asemiconductor device (CSP) according to a seventh embodiment of thisinvention through the sealing parts.

[0059] FIGS. 25(a) to 25(c) are diagrams showing the structure of thesemiconductor device shown in FIG. 24, in which FIG. 25(a) is across-sectional view through a line A-A in FIG. 24,

[0060]FIG. 25(b) is a cross-sectional view through a line B-B in FIG.24, and

[0061]FIG. 25(c), is a cross-sectional view through a line C-C in FIG.24.

[0062]FIG. 25(d) is the front view of the structure of the semiconductordevice shown in FIG. 24.

[0063]FIG. 25(e) is the side view of the structure of the semiconductordevice shown in FIG. 24.

[0064]FIG. 26 is a view of a base surface showing the under surface ofthe semiconductor device (CSP) shown in FIG. 24.

[0065]FIG. 27 is an enlarged partial view showing the detailed structureof the thin film wiring substrate shown in FIG. 8.

[0066]FIG. 28 is a plan view showing an example of a structure of asemiconductor device (CSP) according to an eighth embodiment of thisinvention through the sealing parts.

[0067] FIGS. 29(a) to 29(c) are diagrams showing the structure of thesemiconductor device shown in FIG. 28, in which FIG. 29(a) is across-sectional view through a line A-A in FIG. 28,

[0068]FIG. 29(b) is a cross-sectional view through a line B-B in FIG.28, and

[0069]FIG. 29(c) is a cross-sectional view through a line C-C in FIG.28.

[0070]FIG. 30 is a plan view showing an example of a structure of asemiconductor device (CSP) according to a ninth embodiment of thisinvention through the sealing parts.

[0071] FIGS. 31(a) to 31(c) are diagrams showing the structure of thesemiconductor device shown in FIG. 30, in which FIG. 31(a) is across-sectional view through a line A-A in FIG. 30,

[0072]FIG. 31(b) is a cross-sectional view through a line B-B in FIG.30, and

[0073]FIG. 31(c) is a cross-sectional view through a line C-C in FIG.30.

[0074]FIG. 32 is a plan view showing an example of a structure of asemiconductor device (CSP) according to a tenth embodiment of thisinvention through the sealing parts.

[0075] FIGS. 33(a) to 33(c) are diagrams showing the structure of thesemiconductor device shown in FIG. 32, in which FIG. 33(a) is across-sectional view through a line A-A in FIG. 32,

[0076]FIG. 33(b) is a cross-sectional view through a line B-B in FIG.32, and

[0077]FIG. 33(c) is a cross-sectional view through a line C-C in FIG.32.

[0078]FIG. 34 is a plan view showing an example of a structure of asemiconductor device (CSP) according to an eleventh embodiment of thisinvention through the sealing parts.

[0079] FIGS. 35(a) to 35(c) are diagrams showing the structure of thesemiconductor device shown in FIG. 34, in which FIG. 35(a) is across-sectional view through a line A-A in FIG. 34,

[0080]FIG. 35(b) is a cross-sectional view through a line B-B in FIG.34, and

[0081]FIG. 35(c) is a cross-sectional view through a line C-C in FIG.34.

[0082]FIG. 36 is a plan view showing an example of a structure of asemiconductor device (CSP) according to a twelfth embodiment of thisinvention through the sealing parts.

[0083] FIGS. 37(a) to 37(c) are diagrams showing the structure of thesemiconductor device shown in FIG. 36, in which FIG. 37(a) is across-sectional view through a line A-A in FIG. 36,

[0084]FIG. 37(b) is a cross-sectional view through a line B-B in FIG.36, and

[0085]FIG. 37(c) is a cross-sectional view through a line C-C in FIG.36.

[0086]FIG. 38 is a plan view showing an example of a structure of asemiconductor device (CSP) according to a thirteenth embodiment of thisinvention through the sealing parts.

[0087] FIGS. 39(a) to 39(c) are diagrams showing the structure of thesemiconductor device shown in FIG. 38, in which FIG. 39(a) is across-sectional view through a line A-A in FIG. 38,

[0088]FIG. 39(b) is a cross-sectional view through a line B-B in FIG.38, and

[0089]FIG. 39(c) is a cross-sectional view through a line C-C in FIG.38.

[0090] FIGS. 40(a), 40(b), 40(c) are diagrams each showing anunconnected lead in the semiconductor device according to the fourteenthembodiment of this invention, in which FIG. 40(a) is a cross-sectionalview when the unconnected lead is deformed, and

[0091] FIGS. 40(b), 40(c) are cross-sectional views when the unconnectedlead is not deformed.

[0092] FIGS. 41(a), 41(b), 41(c) are cross-sections each showing atypical structure using a single-layer surface-wired thin film wiringsubstrate in the semiconductor device according to the fifteenthembodiment of this invention.

[0093] FIGS. 42(a), 42(b), 42(c) are cross-sections each showing atypical structure using a two-layer thin film wiring substrate in thesemiconductor device according to the fifteenth embodiment of thisinvention.

[0094] FIGS. 43(a), 43(b), 43(c), 43(d) are enlarged partialcross-sections each showing an example of a lead tip processing sequencein a method of manufacturing a semiconductor device according to thesixteenth embodiment of this invention. FIG. 43(a) before bonding

[0095]FIG. 43(b) during bonding

[0096]FIG. 43(c) after bonding

[0097]FIG. 43(d) after sealing

[0098] FIGS. 44(a), 44(b), 44(c) are enlarged partial cross-sectionsshowing another example of a lead tip processing sequence in a method ofmanufacturing a semiconductor device according to the sixteenthembodiment of this invention, for comparison with the lead tipprocessing sequence of FIG. 43.

[0099]FIG. 44(a) before bonding

[0100]FIG. 44(b) during bonding

[0101]FIG. 44(c) after sealing

[0102] FIGS. 45(a), 45(b), 45(c) are enlarged partial cross-sectionsshowing another example of a lead tip processing sequence in a method ofmanufacturing a semiconductor device according to the sixteenthembodiment of this invention, for comparison with the lead tipprocessing sequence of FIG. 43.

[0103]FIG. 45(a) before bonding

[0104]FIG. 45(b) during bonding

[0105]FIG. 45(c) after sealing

[0106]FIG. 46 is an elastomer specification table showing examples ofcolor specifications of an elastomer (elastic structure) used in asemiconductor device (CSP) according to a seventeenth embodiment of thisinvention.

[0107] FIGS. 47(a) to 47(h) are diagrams showing typical elastomercompositions in a semiconductor device according to an eighteenthembodiment of this invention.

[0108] FIGS. 48(a) to 48(e) are diagrams showing typical elastomercompositions in a semiconductor device according to the eighteenthembodiment of this invention, in which FIGS. 48(a) to 48(d) show a3-layer structure, FIG. 48(e) shows a 5-layer structure.

[0109] FIGS. 49(a) and 48(b) show example thicknesses of a skeletonlayer and adhesive layers of an elastomer according to a nineteenthembodiment of this invention.

[0110]FIG. 50 is a view of a base surface showing the under surface ofthe semiconductor device (CSP) shown in FIG. 20.

[0111] FIGS. 51(a), 51(b), 51(c), 51(d) are diagrams showing an examplestructure of a semiconductor device according to a twenty-firstembodiment of this invention, in which

[0112]FIG. 51(a) is a base view,

[0113]FIG. 51(b) is a side view,

[0114]FIG. 51(c) is a partial cut-away plan view, and

[0115]FIG. 51(d) is a front view.

[0116] FIGS. 52(a), 52(b), 52(c) are diagrams showing the structure ofthe semiconductor device shown in FIG. 51, in which FIG. 52(a) is across-sectional view through a line A-A in FIG. 51,

[0117]FIG. 52(b) is a cross-sectional view through a line B-B in FIG.51, and

[0118]FIG. 52(c) is a cross-sectional view through a line C-C in FIG.51.

[0119] FIGS. 53(a), 53(b) are enlarged partial cross-sections showingthe structure of the semiconductor device shown in FIG. 52, in which

[0120]FIG. 53(a) is a diagram showing a part D in FIG. 52(b), and FIG.53(b) is a diagram showing a part E in FIG. 52(c).

[0121] FIGS. 54(a) to 54(f) are diagrams showing an example of a methodof manufacturing a thin film wiring substrate used in the semiconductordevice according to the twenty-first embodiment of this invention, inwhich

[0122] FIGS. 54(a), 54(c), 54(e) are partial plan views, and FIGS.54(b), 54(d), 54(f) are respectively cross-sections through a line A-A.

[0123] FIGS. 55(a) to 55(d) are diagrams showing an example of a methodof manufacturing a thin film wiring substrate used in the semiconductordevice according to the twenty-first embodiment of this invention, inwhich

[0124] FIGS. 55(a), 55(c) are partial plan views, and

[0125] FIGS. 55(b), 55(d) are respectively cross-sections through a lineA-A.

[0126] FIGS. 56(a) to 56(f) are diagrams showing an example of a methodof manufacturing a thin film wiring substrate used in the semiconductordevice according to the twenty-first embodiment of this invention, inwhich

[0127] FIGS. 56(a), 56(d) are partial plan views,

[0128] FIGS. 56(b), 56(e) are respectively cross-sections through a lineA-A, and

[0129] FIGS. 56(c), 56(f) are respectively cross-sections through a lineB-B.

[0130] FIGS. 57(a) to 57(f) are diagrams showing an example of a methodof manufacturing a thin film wiring substrate used in the semiconductordevice according to the twenty-first embodiment of this invention, inwhich

[0131] FIGS. 57(a), 57(d) are partial plan views,

[0132] FIGS. 57(b), 57(e) are respectively cross-sections through a lineA-A, and

[0133] FIGS. 57(c), 57(f) are respectively cross-sections through a lineB-B.

[0134] FIGS. 58(a) to 58(f) are diagrams showing an example of a methodof manufacturing a thin film wiring substrate used in the semiconductordevice according to the twenty-first embodiment of this invention, inwhich

[0135] FIGS. 58(a), 58(d) are partial plan views,

[0136] FIGS. 58(b), 58(e) are respectively cross-sections through a lineA-A, and

[0137] FIGS. 58(c), 58(f) are respectively cross-sections through a lineB-B.

[0138] FIGS. 59(a), 59(b), 59(c) are diagrams showing an example of amethod of manufacturing a thin film wiring substrate used in thesemiconductor device according to a twenty-second

[0139] embodiment of this invention, in which

[0140]FIG. 59(a) is a side view,

[0141]FIG. 59(b) is a plan view, and

[0142]FIG. 59(c) is a front view.

[0143] FIGS. 60(a), 60(b), 60(c), 60(d) are diagrams showing an exampleof the structure of a thin film wiring substrate according to atwenty-third embodiment of this invention, in which

[0144]FIG. 60(a) is a base view,

[0145]FIG. 60(b) is a side view,

[0146]FIG. 60(c) is a plan view, and

[0147]FIG. 60(d) is a front view.

[0148] FIGS. 61(a), 61(b) are diagrams showing an example of a statewhen sealing is complete in a manufacturing method according to thetwenty-third embodiment of this invention.

[0149] FIGS. 62(a), 62(b), 62(c) are diagrams showing cross-sectionsthrough the plan view shown in FIG. 61(a), in which

[0150]FIG. 62(a) is a cross-section showing the plane A-A,

[0151]FIG. 62(b) is a cross-section showing the plane B-B, and

[0152]FIG. 62(c) is a cross-section showing the plane C-C.

[0153] FIGS. 63(a), 63(b), 63(c) are diagrams showing an example of astate when sealing is complete in a manufacturing method according tothe twenty-third embodiment of this invention, in which

[0154]FIG. 63(a) is a plan view,

[0155]FIG. 63(b) is a side view, and

[0156]FIG. 63(c) is a base view.

[0157]FIG. 64 is a schematic diagram of a state when gas is leaving inthe semiconductor device according to the twenty-third embodiment ofthis invention.

[0158] FIGS. 65(a) to 65(e) are diagrams each showing an examplestructure of a semiconductor device according to a twenty-fourthembodiment of this invention, in which

[0159]FIG. 65(a) is a base view,

[0160]FIG. 65(b) is a side view,

[0161]FIG. 65(c) is a plan view,

[0162]FIG. 65(d) is a front view, and

[0163]FIG. 65(e) is a cross-section through a line C-C in FIG. 65(c).

[0164] FIGS. 66(a), 66(b), 66(c) are diagrams showing an examplestructure of a semiconductor device according to a twenty-fifthembodiment of this invention, in which

[0165]FIG. 66(a) is a plan view,

[0166]FIG. 66(b) is a side view, and

[0167]FIG. 66(c) is a base view.

[0168]FIG. 67 is a partial plan view showing an example of a sealingcompletion state in a method of manufacturing the semiconductor deviceaccording to the twenty-fifth embodiment of this invention.

[0169] FIGS. 68(a), 68(b) are diagrams of cross-sections through thepartial plan view shown in FIG. 67.

[0170] FIGS. 69(a), 69(b) are diagrams each showing an example of astate when sealing is complete in a manufacturing method according tothe twenty-fifth embodiment of this invention, in which

[0171]FIG. 69(a) is a base view, and

[0172]FIG. 69(b) is a base view showing a semiconductor chip removed.

[0173]FIG. 70 is a schematic diagram of a state when gas is leaving inthe semiconductor device according to the twenty-fifth embodiment ofthis invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0174] This invention will now be described in detail with reference tothe attached drawings.

[0175] Embodiment 1

[0176]FIG. 1 is a plan view through the sealing parts of a typicalstructure of a semiconductor device (CSP) according to a firstembodiment of this invention. FIGS. 2(a) to 2(c) are diagrams showingthe structure of the semiconductor device shown in FIG. 1. FIG. 2(a) isa cross-sectional view through a line A-A in FIG. 1, FIG. 2(b) is across-sectional view through a line B-B in FIG. 1, FIG. 2(c) is across-sectional view through a line C-C in FIG. 1. FIGS. 3 (a,b,c,d) arespecification tables showing example specifications of parts used in thesemiconductor device shown in FIG. 1. FIG. 4 is a manufacturing sequenceshowing a typical process for manufacturing the semiconductor deviceshown in FIG. 1. FIG. 5 is a chart showing typical processing conditionsin each stage of the production process shown in FIG. 4. FIG. 6, FIG. 7and FIG. 8 are partial plan views showing a typical method ofmanufacturing a thin film wiring substrate used for a semiconductordevice (CSP) according to the first embodiment of this invention. FIGS.9(a), 9(b) are diagrams each showing a typical method of manufacturingthe semiconductor device (CSP) according to the first embodiment of thisinvention. FIG. 9(a) is a partial plan view showing an elastomerattachment, FIG. 9(b) is a partial plan view showing a semiconductorchip attachment. FIG. 10 is a partial plan view showing an example of acutting position in a method of manufacturing a semiconductor device(CSP) according to the first embodiment of this invention. FIGS. 11(a),11(b) are perspective views showing an example of a lead cutting methodin a method of manufacturing the semiconductor device (CSP) according tothe first embodiment of this invention. FIGS. 12(a), 12(b), 12(c) areperspective views showing an example of an elastomer attachment state ina method of manufacturing a semiconductor device (CSP) according to thefirst embodiment of this invention. FIGS. 13(a), 13(b) are perspectiveviews showing an example of a lead bonding method in a method ofmanufacturing

[0177] a semiconductor device (CSP) according to the first embodiment ofthis invention. FIG. 27 is an enlarged partial view showing the detailedstructure of the thin film wiring substrate shown in FIG. 8.

[0178] A semiconductor device (CSP11) according to the first embodimentshown by FIG. 1 and FIG. 2 is a small structure whereof the package sizeis near the chip size. It comprises a semiconductor chip 1 having a mainsurface 1 a and an electrode pad 1 b (connection terminal or bondingpad) 1 b formed on the outer peripheral part of the main surface 1 a,and bump electrodes 2 which are external terminals arranged on theinside of the semiconductor chip 1. This structure, wherein a pad isformed on the periphery of the chip and bump electrodes are arrangedinside the chip, will hereafter be referred to as a peripheral padfan-in CSP.

[0179] As the external terminals are bump electrodes, the CSP11 is alsoa pole grid array.

[0180] Describing the structure of this CSP11, it comprises an elastomer3 (elastic structure) arranged on the main surface 1 a of thesemiconductor chip 1 so as to leave electrode pads 1 b exposed, a thinfilm wiring substrate 4 comprising a substrate main body 4 a providedwith wiring 4 d of which one end is electrically connected to theelectrode pads 1 b of the semiconductor chip 1 via leads 1 c and theother ends are electrically connected to the bump electrodes 2, openings4 e for exposing the electrode pads 1 b, and substrate protruding parts4 b which protrude beyond these openings 4 e and the semiconductor chip1, and sealing parts 5 which seal the electrode pads 1 b of thesemiconductor chip 1 and seal the leads 4 c of the thin film wiringsubstrate 4, the substrate body 4 a and the substrate protruding parts 4b of the thin film wiring substrate 4 being formed in a one-piececonstruction. (For the purpose of this invention, “wiring” shall beunderstood to mean parts formed on the tape, and “leads” shall beunderstood to mean parts protruding from the tape including the wiring.)The plan view of the CSP11 shown in FIG. 1 is a view through the sealpart 5 shown in FIG. 2 in order to show the electrode pads 1 b of thesemiconductor chip 1 and the leads 4 c of the thin film wiring substrate4.

[0181] Therefore, in the plan view of the CSP11 shown in FIG. 1, theaforesaid sealing parts 5 are omitted, although the sealing parts 5shown in FIG. 2 are actually formed in the openings 4 e of the thin filmwiring substrate 4 of the CSP11 shown in FIG. 1 (this is also the casehereafter for Embodiments 2 to 20).

[0182] In this first embodiment, plural electrode pads 1 b (herein, sixat one side) are disposed on the periphery of each of the two shortsides at right angles (hereinafter referred to as the short sidedirection) to the longitudinal direction of the main surface 1 a of therectangular semiconductor chip 1, and twelve bump electrodes 2 which areexternal terminals are therefore disposed in a grid shape inside thesemiconductor chip 1.

[0183] Therefore, one each of the rectangular openings 4 e is formed ata position corresponding to an outer edge facing the short sidedirection of the main surface of the semiconductor chip 1 in the thinfilm wiring substrate 4.

[0184] As a result, the plural electrode pads 1 b facing the short sidedirection of the semiconductor chip 1 are exposed by the openings 4 e ofthe thin film wiring substrate 4 which are provided at correspondingpositions when the semiconductor chip 1 is attached to the elastomer 3.

[0185] The thin film wiring substrate 4 of the CSP11 according to thefirst embodiment comprises a substrate body part 4 a comprising wiring 4d, two of the openings 4 e, and substrate protruding parts 4 b whichprotrude beyond the substrate body 4 a and two openings 4 e.

[0186] When the semiconductor chip 1 is attached to the elastomer 3, thesubstrate body 4 a, elastomer 3 and semiconductor chip 1 are laminatedtogether, and the substrate protruding parts 4 b of the thin film wiringsubstrate 4 then protrude in an anvil shape beyond the semiconductorchip 1.

[0187] Twelve bump lands 4 f (FIG. 8(a)) which are electricallyconnected to the wiring 4 d and on which the bump electrodes 2 aremounted, are provided in the substrate body 4 a.

[0188] The elastomer 3 is an insulating elastic material which supportsthe semiconductor chip 1, and is arranged between the thin film wiringsubstrate 4 and semiconductor chip 1. The elastomer 3 according to thefirst embodiment comprises protruding parts 3 b (elastic protrudingparts) which protrude beyond the semiconductor chip 1. After assemblingthe CSP11, a predetermined side faces 3 a of the elastomer 3 (herein,the two side faces 3 a in the same direction as the longitudinaldirection of the semiconductor chip 1) are exposed to the outside.

[0189] As shown in FIG. 1 or FIG. 2(c), when the elastomer 3 is attachedto the thin film wiring substrate 4, the elastomer protruding parts 3 bwhich protrude beyond the semiconductor chip 1 in the elastomer 3 arelaid over the substrate protruding parts 4 b of the thin film wiringsubstrate 4.

[0190] The sealing parts 5 are formed by sealing the electrode pads 1 bof the semiconductor chip 1 and the leads 4 c connected to them, thewhole of the opposite side faces 1 c in the short side direction of thesemiconductor chip 1, and the area near both ends of the two oppositeside faces 1 c in the longitudinal direction of the semiconductor chip 1with sealing resin. As the substrate protruding parts 4 b of the thinfilm wiring substrate 4 are formed in the vicinity of the semiconductorchip 1, the sealing resin forms a bridge between (straddles) thesubstrate protruding parts 4 b and the semiconductor chip 1 in thesealing parts 5.

[0191] The specification of each part of the CSP11 (materials,dimensions and thickness, etc.) will now be described referring to FIGS.3(a,b,c,d). It should however be understood that these specificationsare only given as examples, and the invention is not to be construed asbeing limited in any way by them.

[0192] The tape which is the base material of the thin film wiringsubstrate 4 is formed of polyimide resin, and its thickness is of theorder of 25 to 75 μm. The wiring 4 d (comprising the leads 4 c and bumplands 4 f) provided in the thin film wiring substrate 4 is copper foilhaving a thickness of the order of 18 to 25 μm. The wiring 4 d is platedwith Au plating to a thickness of 1. 5 μm on both sides, or Au/Niplating of different thickness on the side of the electrode pad 1 b andthe side of the bump electrode 2.

[0193] In the thin film wiring substrate 4 used in the first embodiment,the wiring 4 d is a single layer structure as shown in FIG. 2(a). It isalso “single layer back wiring” wherein the wiring 4D is formed only onthe under surface of the tape base material (tape base material 4 g inFIG. 6(a)).

[0194] The elastomer 3 is a three-layer structure (FIG. 47) comprising abase layer (skeleton layer 3 d, referred to also as core layer) havingadhesive layers 3 e on both sides. Examples of its application arespecification (1) and specification (2) shown in FIGS. 3(a,b,c,d).Details of

[0195] specification (1) are given in Japanese Patent Application No.Hei 9-149106 and details of specification (2) are given in JapanesePatent Application No. Hei 8-136159.

[0196] The elastomer 3 used in the first embodiment is also colorless,therefore the elastomer 3 according to the first embodiment is aneffectively transparent structure which transmits light.

[0197] From the viewpoints of porosity and water repelling properties,it is also desirable that the base layer (skeleton layer 3 d) of theelastomer 3 is formed of a porous fluoride resin, i.e. it is desirableto use the elastomer of specification (1).

[0198] Herein, the elastomer 3 formed from a porous fluoride resincomprises a skeleton layer 3 d having a 3-dimensional mesh structure.

[0199] This 3-dimensional mesh structure is a non-woven fabric formed by3-dimensional entwining of a fibrous compound.

[0200] The sealing resin, which is the sealing material for forming thesealing parts 5, has the specification (1) or the specification (2)shown in FIGS. 3(a,b,c,d).

[0201] During cure bake after sealing, voids tend to form in the solventtype liquid resin when the solvent vaporizes, and it is thereforedesirable to use the resin of specification (1).

[0202] The sealing resin used in the CSP11 of the first embodiment is amaterial of relatively high volatility. However, it is possible to usesealing resin of high volatility by increasing the displacement time ofa potting nozzle, not shown, during the coating step (e.g. approximately30 seconds for coating the six electrode pads 1 b on one side of thesemiconductor chip 1), or by heating the sealing resin, and it is thuspossible to form a bridge of sealing resin between the substrateprotruding parts 4 b and semiconductor chip 1.

[0203] It is also preferable to use a resin containing silica to reduceresidual stress due to contraction during seal cure, and more preferableto use a resin containing at least 50 weight percent silica.

[0204] The material of the bump electrode 2 is Sn/Pb eutectic solder orother high melting point solder, or Au-plated Ni or the like, and itsdiameter is of the order of 0.3-0.6 mm.

[0205] The CSP11 (semiconductor device) of the first embodiment offersthe following advantages.

[0206] The substrate body 4 a and substrate protruding parts 4 b of thethin film wiring substrate 4 are formed in a one-piece construction. Asthe substrate protruding parts 4 b are not a separate structure from thesubstrate body 4 a, it is not necessary to form the substrate protrudingparts 4 b from costly materials.

[0207] Therefore, the cost of manufacturing the CSP11 (semiconductordevice) is reduced.

[0208] As the substrate protruding parts 4 b protrude beyond theopenings 4 e in the thin film wiring substrate 4, the sealing parts 5may be formed as a bridge between the substrate protruding parts 4 b andthe semiconductor chip 1 when the sealing resin is applied via theopenings 4 e.

[0209] As a stable seal is obtained sealing properties are improved, andas a result, humidity resistance is more reliable.

[0210] The sealing resin contains at least 50 weight percent silica, soresidual stress due to contraction in cure bake can be reduced.

[0211] Therefore, the reliability of the sealing parts 5 is improved.

[0212] The base layer of the elastomer 3 which forms the elasticstructure is constructed of a porous fluoride resin, and the twoopposite side faces 3 a of the elastomer 3 in the same direction as thelongitudinal direction of the semiconductor chip 1 are exposed to theoutside. Therefore, water vapor due to moisture absorbed during reflowcan be released to the outside, reflow properties are improved, andentry of water into the CSP11 can be prevented by the water repellingproperties of the fluoride in the porous fluoride resin.

[0213] As a result, degradation of electrical properties of the CSP11 isreduced.

[0214] Next, the method of manufacturing the CSP11 (semiconductordevice) of the first embodiment will be described together with theadvantages gained therefrom.

[0215] The method will be described in the sequence shown in FIG. 4referring to the process conditions shown in FIG. 5.

[0216] The elastomer 3 shown in FIG. 9, FIG. 10, FIG. 12 and FIG. 13comprises openings 3 c. These figures describe the method ofmanufacturing the CSP16, 17 of the sixth or seventh embodimentsdescribed later, but as the first embodiment is the same as regards thebasic manufacturing method, FIG. 9, FIG. 10, FIG. 12 and FIG. 13 will beused also in the first embodiment.

[0217] First, the thin film wiring substrate 4 comprising the substratebody 4 a comprising the wiring 4 d, and the substrate protruding parts 4b which protrude beyond the openings 4 e in which the leads 4 c areconnected to the wiring 4 d, is provided.

[0218] The method of manufacturing the thin film wiring substrate 4 willbe described referring to FIG. 6 to FIG. 8.

[0219] First, the tape base material 4 g comprising the polyimide resinshown in FIG. 6(a) is prepared. An adhesive for attaching the copperfoil 4 h shown in FIG. 7(b) is coated on the top and under surfaces ofthis base tape 4 g.

[0220] Next, preparing holes 4 i for tape feed are formed at anapproximately equal interval on both sides of the tape base material 4 gas shown in FIG. 6(b).

[0221] Next, twelve bump openings 4 j and two wiring join holes 4 e onboth sides are formed by stamping as shown in FIG. 7(a) and the copperfoil 4 h is laminated on the tape base material 4 g as shown in FIG.7(b).

[0222] The copper foil 4 h is then fashioned into a desired pattern byetching as shown in FIG. 8(a) so as to form a wiring pattern.

[0223] This forms the bump lands 4 f and a power supply line 4 k.

[0224] In order to make the aforesaid gold plating electrically reactafter plating the copper foil 4 h, adjacent power supply lines 4 k mustbe connected together.

[0225] After etching the copper foil 4 h to form the wiring pattern, thecopper foil 4 h is gold plated. The specification of this gold platingis that of the wiring plating shown in FIGS. 3(a,b,c,d). It may be goldplating having a thickness of 1. 5 μm (wiring plating (1) shown in FIGS.3(a,b,c,d)), gold/nickel differential thickness plating (wiring plating(2) shown in FIGS. 3(a,b,c,d)), or another type of plating.

[0226] The wiring leads which are connected together as shown in FIG.8(a) are then cut by a punch die 6 a of a cutter 6 shown in FIG. 11(a)so as to separate the leads 4 c as shown in FIG. 8(b).

[0227] As regards the width of the cutting blade of the punch die 6, itis desirable to use a small cutting blade having a width of the order of50 to 200 μm and more preferably 100 to 150 μm so that the leads 4 c canbe fashioned into a beam shape

[0228]41 after cutting as shown in FIG. 11(b).

[0229] By using a small cutting blade of the order of 125 μm, the cutparts of the leads 4 c can be formed with a dimension of the order of125 μm, and as a result, the distance between the semiconductor chip 1and the substrate protruding parts 4 b can be shortened when thesemiconductor chip 1 (FIG. 1) is mounted.

[0230] The sealing areas of the sealing parts 5 can therefore be madenarrow, so sealing properties are improved.

[0231] Also as the distance between the semiconductor chip 1 and thesubstrate protruding parts 4 b can be made short, the CSP11 cam be madecompact.

[0232] By cutting so as to fashion the leads 4 c into the beam shape 41shown in FIG. 11(b), the thin film wiring substrate 4 shown in FIG. 8(b)is produced.

[0233] The detailed structure of the thin film wiring substrate 4 usedin the first embodiment will now be described referring to FIG. 8 andFIG. 27.

[0234] As shown in FIG. 27, four long holes 4 q effectivelycorresponding to the four sides of the substrate body 4 a are formedaround the substrate body 4 a.

[0235] The purpose of these holes 4 q is to reduce the cross-sectionalarea when the substrate body 4 a is cut off, improve ease of cutting,and to lessen distortion when winding up or cutting the thin film wiringsubstrate 4 which is in the

[0236] form of a long thin tape.

[0237] Positioning holes 4 p for positioning during cutting are providedoutside the upper and lower long holes 4 q of the substrate body 4 a(according to this embodiment a total of three holes is provided, i.e.one upper one and two lower ones), but there is no limit on the numberof these positioning holes 4 p if they are provided outside both theupper and lower long holes 4 q.

[0238] Recognition patterns 4 n formed of the same copper foil as thewiring pattern are also provided in these upper and lower long holes 4 qof the substrate body 4 a.

[0239] These recognition patterns 4 n are used to recognize the positionof the thin film wiring substrate 4 during cutting, etc., and are suchthat they can be recognized also from the reverse side of the thin filmwiring substrate 4 (side on which there is no wiring pattern) duringbonding. Specifically, they straddle the ends of the long holes 4 q sothat they can be recognized from the top surface and under surface ofthe thin film wiring substrate 4.

[0240] The thin film wiring substrate 4 shown in FIG. 27 comprisesplural substrate bodies 4 a arranged horizontally in a row with respectto the feed direction, however plural rows of the substrate bodies 4 a(e.g. two) may be arranged horizontally.

[0241] In this case, the efficiency of manufacturing the CPU11 may beimproved.

[0242] Subsequently, thin film wiring substrate supply 20 and elastomersupply 21 shown in FIG. 4 are performed, and elastomer attachment 22 isperformed.

[0243] To attach the elastomer 3, the substrate body 4 a of the thinfilm wiring substrate 4 and elastomer 3 are joined as shown in FIG. 9(a)based on elastomer attachment conditions whereof an example is given inFIG. 5.

[0244] In this way, the thin film wiring substrate 4 is assembled withthe elastomer 3.

[0245] When the elastomer 3 is attached, there may be three positionalrelationships of the elastomer 3 and substrate body 4 a as shown inFIGS. 12(a), 12(b), 12(c).

[0246] First, FIG. 12(a) shows the case where the edge of the substratebody 4 a protrudes beyond the elastomer 3 by an protruding amount P.

[0247]FIG. 12(b) shows the case where the edge of the substrate body 4 aand the edge of the elastomer are perfectly aligned. FIG. 12(c) showsthe case where the edge of the substrate body 4 a falls short of theelastomer 3 by an amount Q.

[0248] In general, during heat curing after applying a sealing material(herein, a sealing resin), volatile components of the sealing materialare produced as volatile gases. As the specific gravity of thesevolatile gases is less than that of the sealing material, the volatilegases escape to the outside

[0249] from the upper part of the sealing material.

[0250] However, when a P value predetermined range described hereafteris exceeded and the edge of the elastomer 3 does not protrude to theedge of the substrate body 4 a (P>300 μm), volatile gases producedfurther inside than the edge of the substrate body 4 a cannot escape tothe outside of the sealing material as the upper part is obstructed bythe edge of the substrate body 4 a, so these gases remain as bubbles inthe sealing material.

[0251] After heat curing of the sealing material, part of the componentsof the volatile gases in the bubbles gradually escape to the outsidethrough minute (intermolecular) gaps in the sealing material, so theinternal pressure of the bubbles is released.

[0252] As a result, voids are formed in the sealing material where thebubbles occur.

[0253] The voids create unfilled spaces in areas which should be filledby sealing material, and have an adverse effect on the humidityresistance and temperature cycle reliability of the semiconductordevice.

[0254] It is therefore desirable that the value of P lies within a Pvalue predetermined range of O≦P≦300 μm, and preferably O≦P≦100 μm, sothat the escape path of the volatile gases is not obstructed by thesubstrate body 4 a, and so that the volatile gases produced can bereleased outside the sealing

[0255] material.

[0256] If this is done, voids are not formed in the sealing material.

[0257] On the other hand, when a Q value predetermined range describedhereafter is exceeded and the edge of the elastomer 3 protrudes beyondthe edge of the substrate body 4 a (Q>100 μm), part of the leads 4 c isfixed by the elastomer 3, so a correct wiring configuration cannot beformed when the leads 4 c are bonded.

[0258] This has an adverse effect on temperature cycle reliability.

[0259] It is therefore desirable that the position of the edge of theelastomer 3 relative to the edge of the substrate body 4 a is within a Qvalue predetermined range of for example 0≦Q≦100 μm, and preferably0≦Q≦50 μm, so that correct bonding of the leads 4 c can be performed.

[0260] Hence, by ensuring that P and Q are within the predeterminedranges, a CSP11 of high reliability can be manufactured free of voids inthe sealing material and wherein the leads 4 c are correctly bonded.

[0261] Subsequently, chip supply 23 (FIG. 4) is performed wherein thesemiconductor chip 1 is supplied having the electrode pads 1 b on theouter periphery of the main surface 1 a as shown in FIG. 2(a). Chipattachment 24 shown in FIG. 4 is then performed based on the chipattachment conditions

[0262] shown in FIG. 5.

[0263] Herein, in the chip attachment 24, the main surface 1 a of thesemiconductor chip 1 is joined to the elastomer 3 as shown in FIG. 2(a)leaving the electrode pads 1 b of the semiconductor chip 1 exposed inthe openings 4 e of the thin film wiring substrate 4, as shown in FIG.1.

[0264] Specifically, the semiconductor chip 1 is attached to the top ofthe elastomer 3 as shown in FIG. 9(b).

[0265] Subsequently, an elastomer cure bake 25 shown in FIG. 4 isperformed based on the post-chip attachment cure conditions shown inFIG. 5 so as to raise the joining strength of the elastomer 3 andsemiconductor chip 1.

[0266] Next, inner lead connections 26 shown in FIG. 4 is performedbased on the inner lead connection conditions shown in FIG. 5. Two setsof inner lead connection conditions (1) and (2) are shown in FIG. 5,however the inner lead connection conditions are not limited to this.

[0267] First, a bonding tool 7 is lowered to a predetermined position asshown in FIG. 13(a), then one of the leads 4 c of the thin film wiringsubstrate 4 is pressed onto the corresponding electrode pad 1 b on thesemiconductor chip 1 by the bonding tool 7 so that the lead 4 c and theelectrode pad 1 b are electrically connected.

[0268] The bonding method of the first embodiment is single bonding.

[0269] After bonding, the lead 4 c is pushed up by the bonding tool 7 sothat it is just above the electrode pad 1 b. If a value obtained bydividing the stress produced in the taper-shaped tip of the lead 4 c bythe stress produced at the edge of the substrate body 4 a is defined asa bending stress ratio alpha, this bending stress ratio a is given bythe following expression from the dimensions of the taper-shaped lead 4c:

(α=: L 33 (K−J)/(M×K) (FIG. 13(a))

[0270] The dimensions and shape of the lead 4 c are therefore designedsuch that the bending stress ratio a is within the range 1.0 to 1.75.

[0271] Subsequently, supply of sealing resin which is the sealingmaterial, i.e. a sealing material supply 27, is performed as shown inFIG. 4.

[0272] Specifically, a resin sealing 28 shown in FIG. 4 is performedusing a sealing material (sealing resin) shown in the sealing materialspecifications of FIGS. 3(a,b,c,d).

[0273] In this step, the sealing resin is allowed to drip from theopening 4 e of the thin film wiring substrate 4 shown in FIG. 1 by apotting method using a potting nozzle, not shown, and the electrode pad1 b of the semiconductor chip 1 and lead 4 c of the thin film wiringsubstrate 4 are sealed so as to form the sealing parts 5. The drip timemay be for example 30 seconds for the openings 4 e on one side.

[0274] As the space between the substrate protruding parts 4 b andsemiconductor chip 1 can be sealed in a bridge-like fashion in the CSP11of the first embodiment, a stable resin sealing 28 can be performed, andthe humidity resistance of the sealing parts 5 can therefore be mademore reliable.

[0275] Next, a sealing material cure bake 29 shown in FIG. 4 isperformed based on the post-seal curing conditions shown in FIG. 5 so asto harden the sealing parts 5.

[0276] Also, a pole supply 30 (FIG. 4) is performed for supplying a bumppole material shown in the bump pole specifications of FIGS. 3(a,b,c,d)to the bump openings 4 j (FIG. 7(a)).

[0277] A bump forming 31 shown in FIG. 4 is then performed based on thereflow conditions for bump forming shown in FIG. 5.

[0278] The bump forming 31 is performed by passing the material obtainedby supplying the pole material to the openings 4 j of the substrate body4 a through a reflow furnace, not shown.

[0279] This electrically connects the wiring 4 d to the bump electrodes2 as shown in FIG. 1 and FIG. 2.

[0280] When the bump electrodes 2 are formed according to the firstembodiment, even if the CSP11 has absorbed moisture and is passedthrough reflow, the side faces 3 a in a predetermined direction of theelastomer 3 (herein, the two opposite side faces 3 a in the samedirection as the longitudinal direction of the semiconductor chip 1) areexposed to the outside, so water vapor produced during ref low candisperse to the outside

[0281] through the elastomer 3.

[0282] Reflow tolerance is therefore improved.

[0283] Next, a mark 32 (FIG. 4) for marking a number of the product(CSP11) is performed.

[0284] Subsequently, a cutting 33 shown in FIG. 4 is performed at acutting position 8 shown in FIG. 10 so as to obtain different CSP11 ofdesired sizes.

[0285] Embodiment 2

[0286]FIG. 14 is a plan view through the sealing parts of a typicalstructure of a semiconductor device (CSP) according to a secondembodiment of this invention. FIGS. 15(a) to 15(c) are diagrams showingthe structure of the semiconductor device shown in FIG. 14. FIG. 15(a)is a cross-sectional view through a line A-A in FIG. 14, FIG. 15(b) is across-sectional view through a line B-B in FIG. 14, FIG. 15(c) is across-sectional view through a line C-C in FIG. 14.

[0287] A CSP12 (semiconductor device) according to the second embodimentis a peripheral pad fan-in CSP as is the CSP11 of the first embodimentshown in FIG. 1. It has a substantially identical structure to that ofthe CSP11, however a difference from the CSP11 of the first embodimentis that in the cutting step 33 after the bump forming 31 shown in FIG.4, in the regions of the sealing parts 5 formed in the protruding part 4b, the substrate protruding parts 4 b and the sealing parts 5 aresimultaneously cut to a desired size. In this way, the CSP12 can be madeeven more compact than the CSP11 shown in FIG. 1.

[0288] To implement this, a low silica sealing resin having a lowproportion of silica must be used as sealing resin.

[0289] Specifically, the proportion of silica (filler) in the sealingresin must lie within the range of 0 to 50 weight percent, and it ispreferably 0 weight percent.

[0290] The silica mentioned herein is extremely hard, but it lowers theresidual stress of the sealing resin in the sealing material cure bakeshown in FIG. 4.

[0291] The remaining features of the construction of the CSP12 accordingto the second embodiment and of its method of manufacture are identicalto those of the CSP11 of the first embodiment, so their description willnot be repeated.

[0292] The advantages of the CSP12 of the second embodiment and itsmethod of manufacture are as follows.

[0293] First, in the region of the sealing parts 5 formed in thesubstrate protruding parts 4 b, the substrate protruding parts 4 b andsealing parts 5 are simultaneously cut to a desired size. As thiscutting is performed regardless of the extent to which sealing resin hasspread in the substrate protruding parts 4 b (size of the sealing parts5 formed in the substrate protruding parts 4 b), the CSP12 can be madecompact.

[0294] As the proportion of silica in the sealing resin is low, thehardness of the sealing parts 5 after the sealing resin has hardened canbe lowered, so the life of the cutting die used to cut the substrateprotruding parts 4 b and sealing parts 5 can be lengthened.

[0295] The remaining advantages of the CSP12 according to the secondembodiment and of its method of manufacture are identical to those ofthe CSP11 of the first embodiment, so their description will not berepeated.

[0296] Embodiment 3

[0297]FIG. 16 is a plan view through the sealing parts of a typicalstructure of a semiconductor device (CSP) according to a thirdembodiment of this invention. FIGS. 17(a) to 17(c) are diagrams showingthe structure of the semiconductor device shown in FIG. 16. FIG. 17(a)is a cross-sectional view through a line A-A in FIG. 16, FIG. 17(b) is across-sectional view through a line B-B in FIG. 16, FIG. 17(c) is across-sectional view through a line C-C in FIG. 16.

[0298] A CSP13 (semiconductor device) according to the third embodimentis a peripheral pad fan-in CSP as is the CSP12 of the second embodimentshown in FIG. 14 and FIG. 15. It has a substantially identical structureto that of the CSP12, however a difference from the CSP12 of the secondembodiment is that in the resin sealing step 28 shown in FIG. 4, theresin sealing 28 is performed on the two opposite side faces 1 c in thelongitudinal direction of the semiconductor chip 1 as shown in FIG.17(c) as well as the resin sealing 28 of the first embodiment.

[0299] During the resin sealing 28 performed on the two opposite sidefaces 1 c in the longitudinal direction of the semiconductor chip 1,after the sealing material cure bake 29 of the first embodiment, theCSP13 is temporarily turned over with its top surface and under sidesreversed.

[0300] Sealing resin is then applied again to the two opposite sidefaces 1 c in the longitudinal direction of the semiconductor chip 1 andthe adjacent substrate protruding parts 4 b from the under surface(reverse side to the main face 1 a) of the semiconductor chip 1 so as torepeat the resin sealing 28.

[0301] Subsequently, in the cutting step 33 shown in FIG. 4, thesubstrate protruding parts 4 b, elastomer protruding parts 3 b of theelastomer 3 and the sealing parts 5 formed therein are simultaneouslycut to the desired size.

[0302] As a result, in the CSP13 of the third embodiment, the resinsealing 28 is performed over all the four side faces 1 c of thesemiconductor chip 1 as shown in FIG. 17, and the sealing parts 5 arethereby formed on all the four side faces 1 c of the semiconductor chip1.

[0303] The remaining features of the construction of the CSP13 accordingto the third embodiment and of its method of manufacture are identicalto those of the CSP12 of the first embodiment, so their description willnot be repeated.

[0304] The advantages of the CSP13 of the third embodiment and itsmethod of manufacture are as follows.

[0305] In the CSP13, all of the four side faces 1 c of the semiconductorchip 1 are covered by sealing resin, so the seal properties (herein,humidity resistance) of the semiconductor chip 1 are improved.

[0306] As a result, a compact, highly reliable CSP13 can be obtained.

[0307] The remaining advantages of the CSP13 according to the thirdembodiment and of its method of manufacture are identical to those ofthe CSP12 of the second embodiment, so their description will not berepeated.

[0308] Embodiment 4

[0309]FIG. 18 is a plan view through the sealing parts of a typicalstructure of a semiconductor device (CSP) according to a thirdembodiment of this invention. FIGS. 19(a) to 19(c) are diagrams showingthe structure of the semiconductor device shown in FIG. 18. FIG. 19(a)is a cross-sectional view through a line A-A in FIG. 18, FIG. 19(b) is across-sectional view through a line B-B in FIG. 18, FIG. 19(c) is across-sectional view through a line C-C in FIG. 18.

[0310] A CSP14 (semiconductor device) according to the fourth embodimentis a peripheral pad fan-in CSP as is the CSP13 of the third embodimentshown in FIG. 16 and FIG. 17. It has a substantially identical structureto that of the CSP13, however a difference from the CSP13 of the thirdembodiment is that the elastomer 3 and the substrate body 4 a of thethin film wiring substrate 4 are formed with substantially the samesize, as shown in FIG. 18.

[0311] In other words, the elastomer 3 in the CSP14 of the fourthembodiment does not comprise the elastomer protruding parts 3 b shown inthe first to third embodiments.

[0312] Therefore, when the resin sealing 28 is performed by the samemethod as the resin sealing 28 of the third embodiment, all of the fourside faces 3 a of the elastomer 3 are covered by sealing resin as wellas the all of the four side faces 1 c of the semiconductor chip 1.

[0313] Consequently, all of the outer side faces 1 c, 3 a of thesemiconductor chip 1 and elastomer 3 are covered together to form thesealing parts 5, and the sealing parts 5 covering all of the outer sidefaces 1 c, 3 a are also directly joined to the substrate protrudingparts 4 b of the thin film wiring substrate 4.

[0314] Moreover, all of the surfaces of the elastomer 3 are covered bythe sealing parts 5, substrate body 4 a and semiconductor chip 1.

[0315] The remaining features of the construction of the CSP14 accordingto the fourth embodiment and of its method of manufacture are identicalto those of the CSP13 of the third embodiment, so their description willnot be repeated.

[0316] The advantages of the CSP14 of the fourth embodiment and itsmethod of manufacture are as follows.

[0317] In the CSP14, as all of the surfaces of the elastomer 3 arecovered, the same advantages as when the side faces 3 a of the elastomer3 are exposed cannot be obtained. However as all of the side faces 1 c,3 a of the semiconductor chip 1 and elastomer 3 are covered so as toform the sealing parts 5, and all of the peripheral sealing parts 5 aredirectly joined to the substrate protruding parts 4 b of the thin filmwiring substrate 4, the seal properties (humidity resistance) of thesemiconductor chip 1 are further improved.

[0318] The remaining advantages of the CSP14 according to the fourthembodiment and of its method of manufacture are identical to those ofthe CSP13 of the third embodiment, so their description will not berepeated.

[0319] Embodiment 5

[0320]FIG. 20 is a plan view through the sealing parts of a typicalstructure of a semiconductor device (CSP) according to a fifthembodiment of this invention. FIGS. 21(a) to 21(c) are diagrams showingthe structure of the semiconductor device shown in FIG. 20. FIG. 21(a)is a cross-sectional view through a line A-A in FIG. 20, FIG. 21(b) is across-sectional view

[0321] through a line B-B in FIG. 20, FIG. 21(c) is a cross-sectionalview through a line C-C in FIG. 20.

[0322] A CSPI5 (semiconductor device) according to the fifth embodimentis a peripheral pad fan-in CSP as is the CSP14 of the fourth embodimentshown in FIG. 18 and FIG. 19. It has a substantially identical structureto that of the CSP14, however a difference from the CSP14 of the fourthembodiment is that seal openings 4 m are provided at positionscorresponding to the two opposite side faces 1 c in the longitudinaldirection of the semiconductor chip 1 (FIG. 21(c)) in the substrateprotruding parts 4 b of the thin film wiring substrate 4 in addition tothe openings 4 e exposing the electrode pads 1 b, as shown in FIG. 20.

[0323] Specifically, the two openings 4 e are provided at positionsexposing the electrode pads 1 b on both sides of the semiconductor chip1, and the two opposite seal openings 4 m are provided in a direction atright angles to them, in the thin film wiring substrate 4 of the CSP14according to the fourth embodiment.

[0324] Hence, when the resin sealing 28 shown in FIG. 4 is performed,sealing resin can be applied through the openings 4 e and the sealopenings 4 m from the top surface of the thin film wiring substrate 4.

[0325] Therefore, the four side faces 1 c of the semiconductor chip 1can be covered by sealing resin by this bonding method.

[0326] The remaining features of the construction of the CSP15 accordingto the fifth embodiment and of its method of manufacture are identicalto those of the CSP14 of the fourth embodiment, so their descriptionwill not be repeated.

[0327] The advantages of the CSP15 of the fifth embodiment and of itsmethod of manufacture are as follows.

[0328] In the CSP15, as the resin sealing 28 is performed by applyingsealing resin through the openings 4 e and the seal openings 4 m fromthe top surface (one side) of the thin film wiring substrate 4, there isno need to turn the CSP15 over during the resin sealing step, soproductivity is improved.

[0329] The remaining advantages of the CSP14 according to the fourthembodiment and of its method of manufacture are identical to those ofthe CSP13 of the third embodiment, so their description will not berepeated.

[0330] Embodiment 6

[0331]FIG. 22 is a plan view through the sealing parts of a typicalstructure of a semiconductor device (CSP) according to a sixthembodiment of this invention. FIGS. 23(a) to 23(c) are diagrams showingthe structure of the semiconductor device shown in FIG. 22. FIG. 23(a)is a cross-sectional view through a line A-A in FIG. 22, FIG. 23(b) is across-sectional view through a line B-B in FIG. 22, FIG. 23(c) is across-sectional view through a line C-C in FIG. 22.

[0332] A CSP16 (semiconductor device) according to the sixth embodimentis a peripheral pad fan-in CSP as is the CSP12 of the second embodimentshown in FIG. 14 and FIG. 15. It has a substantially identical structureto that of the CSP12, however a difference from the CSP12 of the secondembodiment is that openings 3 c to those in the thin film wiringsubstrate 4 are provided also in the elastomer 3 to expose the electrodepads 1 b of the semiconductor chip 1, as shown in FIG. 22.

[0333] Specifically, the elastomer 3 in the CSP16 comprises the twoopenings 3 c exposing the electrode pads 1 b, and elastomer protrudingparts 3 b (elastic structure protruding parts) which protrude beyondthese openings 3 c and the semiconductor chip 1.

[0334] Hence, when the elastomer 3 is attached to the thin film wiringsubstrate 4, the positions of the two openings 4 e and 3 c in thesemembers can be aligned.

[0335] The elastomer protruding parts 3 b of the sixth embodiment areprovided around the whole periphery of the elastomer 3.

[0336] The resin sealing 28 (FIG. 4) in the CSP16 according to the sixthembodiment is identical to the resin sealing 28 according to the secondembodiment.

[0337] The elastomer protruding parts 3 b which are provided in theelastomer 3 beyond the openings 3 c have the additional effect of a dampreventing flow of sealing resin.

[0338] Therefore in the CSP16 according to the sixth embodiment,

[0339] the substrate protruding parts 4 b of the thin film wiringsubstrate 4 and the elastomer protruding parts 3 b laminated on them maybe simultaneously cut in the cutting step 33 shown in FIG. 4, so thechip package may be made compact.

[0340] Specifically, the contour of the thin film wiring substrate 4 andelastomer 3 are cut to effectively the same size in the cutting step 33.

[0341] Further in the CSP16, as the sealing parts 5 formed by the resinsealing 28 are not cut in the cutting step 33, a sealing resincomprising 50 weight percent or more of silica may be used.

[0342] The remaining features of the construction of the CSP16 accordingto the sixth embodiment and of its method of manufacture are identicalto those of the CSP12 of the second embodiment, so their descriptionwill not be repeated.

[0343] The advantages of the CSP16 of the sixth embodiment and itsmethod of manufacture are as follows.

[0344] In the CSP16, leakage of sealing resin during the resin sealingstep 28 is prevented by the elastomer protruding parts 3 b provided inthe elastomer 3.

[0345] As the elastomer protruding parts 3 b are provided around thewhole periphery of the elastomer 3, leakage of sealing resin may beprevented over the whole of the substrate protruding parts 4 b of thethin film wiring substrate 4.

[0346] There is therefore no need to cut the sealing resin in thecutting step 33, and the contour of the CSP16 may be made compact.

[0347] Further as sealing resin is not cut in the cutting step 133, asealing resin comprising 50 weight percent or more of silica may beused.

[0348] The contraction factor of the sealing resin in the resin materialcure bake 29 shown in FIG. 4 is thereby reduced, and residual stress inthe sealing resin is reduced.

[0349] The remaining advantages of the CSP16 according to the sixthembodiment and of its method of manufacture are identical to those ofthe CSP12 of the second embodiment, so their description will not berepeated.

[0350] Embodiment 7

[0351]FIG. 24 is a plan view through the sealing parts of a typicalstructure of a semiconductor device (CSP) according to a seventhembodiment of this invention. FIGS. 25(a) to 25(c) are diagrams showingthe structure of the semiconductor device shown in FIG. 24. FIG. 25(a)is a cross-sectional view through a line A-A in FIG. 24, FIG. 25(b) is across-sectional view through a line B-B in FIG. 24, FIG. 25(c) is across-sectional view through a line C-C in FIG. 24.

[0352] A CSP17 (semiconductor device) according to the seventhembodiment is a peripheral pad fan-in CSP as is the CSP16 of the sixthembodiment shown in FIG. 22 and FIG. 23. It has a substantiallyidentical structure to that of the CSP16, however a difference from theCSP16 of the third embodiment is that the elastomer 3 is madesufficiently thick when the CSP17 is assembled that the four side walls1 c of the semiconductor chip 1 are surrounded by the elastomerprotruding parts 3 c of the elastomer 3, as shown in FIGS. 25(a), 25(b),25(c).

[0353] In the CSP17, as the elastomer 3 is made thick, the elastomer 3can be formed of a porous fluoride resin.

[0354] Therefore in the CSP17 according to the seventh embodiment, thesemiconductor chip 1 is attached so that the peripheral side faces 1 care surrounded only by the elastomer protruding parts 3 b (elasticstructure protruding parts) of the elastomer 3, as shown in FIG. 25(c).

[0355]FIG. 26 shows the layout of the wiring 4 d in the CSP17.

[0356] The method of attaching (fixing) the semiconductor chip 1 shownin FIG. 25(c) will now be described.

[0357] To perform the chip attachment 24 shown in FIG. 4, thesemiconductor chip 1 is pushed into the elastomer 3 by making use of thefact that the elastomer 3 is a porous fluoride resin.

[0358] As the elastomer 3 is a porous fluoride resin, it can be easilydepressed under a comparatively small load.

[0359] The thickness of the elastomer 3 directly underneath thesemiconductor chip 1 can therefore be made much smaller than thethickness of the outer periphery of the semiconductor chip 1.

[0360] As a result, the semiconductor chip 1 can be formed into astructure wherein the side faces 1 c on the outer periphery aresurrounded by the elastomer protruding parts 3 b formed all around theperiphery.

[0361] Sealing resin is then applied through the openings 4 e of thethin film wiring substrate 4 and the openings 3 c of the elastomer 3 soas to form the sealing parts 5 at both ends of the semiconductor chip 1.

[0362] Therefore in the CSP17, by pressing the semiconductor chip 1 intothe elastomer 3, the region near the center of the opposite side faces 1c in the longitudinal direction of the semiconductor chip 1 is coveredby the elastomer protruding parts 3 b of the elastomer 3 without sealingusing sealing resin, as shown in FIG. 25(c).

[0363] The remaining features of the construction of the CSP17 accordingto the seventh embodiment and of its method of manufacture are identicalto those of the CSP16 of the sixth embodiment, so their description willnot be repeated.

[0364] The advantages of the CSP17 of the seventh embodiment and itsmethod of manufacture are as follows.

[0365] In the CSP17, as the elastomer 3 is a porous fluoride resin, andas the thickness of the elastomer 3 directly underneath thesemiconductor chip 1 can be made much smaller than that of the outerperiphery of the semiconductor chip 1, the semiconductor chip 1 can beattached so that the side faces 1 c on the outer periphery of thesemiconductor chip 1 are surrounded by the elastomer protruding parts 3b.

[0366] Hence, flow of sealing resin to the outside during the resinsealing step 28 of FIG. 4 is prevented by the elastomer protruding parts3 b and it is unnecessary to cut the sealing resin, so the CSP17 may bemade compact.

[0367] The remaining advantages of the CSP17 according to the seventhembodiment and its method of manufacture are identical to those of theCSP16 of the sixth embodiment, so their description will not berepeated.

[0368] Embodiment 8

[0369]FIG. 28 is a plan view through the sealing parts of a typicalstructure of a semiconductor device (CSP) according to an eighthembodiment of this invention. FIGS. 29(a) to 29(c) are diagrams showingthe structure of the semiconductor device shown in FIG. 28. FIG. 29(a)is a cross-sectional view through a line A-A in FIG. 28, FIG. 29(b) is across-sectional view through a line B-B in FIG. 28, FIG. 29(c) is across sectional view through a line C-C in FIG. 28.

[0370] A CSP18 (semiconductor device) according to the eighth embodimentis a peripheral pad fan-in CSP as is the CSP12 of the second embodimentshown in FIG. 14. It has a substantially identical structure to that ofthe CSP12, however a difference from the CSP12 of the second embodimentis that open rectangular dam pieces 34 are provided around the openings4 e on the surfaces of the substrate protruding parts 4 b of the thinfilm wiring substrate 4 on the chip mounting side to prevent leakage ofsealing resin in the resin sealing step 28 (FIG. 4).

[0371] These dam pieces 34 are formed by hardening an epoxy coatingresin or the like.

[0372] In the CSP18, as the sealing parts 5 formed in the resin sealingstep 28 are not cut during the cutting 33 (FIG. 4), a sealing resincomprising 50 weight percent or more of silica can be used as sealingmaterial.

[0373] Also, in the CSP18, the two opposite side faces 1 c parallel tothe longitudinal direction of the semiconductor chip 1 are not sealedand are exposed.

[0374] The remaining features of the construction of the CSP18 accordingto the eighth embodiment and of its method of manufacture are identicalto those of the CSP12 of the second embodiment, so their descriptionwill not be repeated.

[0375] The advantages of the CSP18 of the eighth embodiment and itsmethod of manufacture are as follows.

[0376] In the CSP18, as the dam pieces 34 are provided in the substrateprotruding parts 4 b of the thin film wiring substrate 4 to preventleakage of sealing resin in the resin sealing step 28, the sealing resinneed not be cut, and the contour of the CSP18 can be made compact.

[0377] Further, as sealing resin is not cut in the cutting step 33, asealing resin comprising 50 weight percent or more of silica may beused.

[0378] The contraction factor of the sealing resin in the resin materialcure bake 29 shown in FIG. 4 is thereby reduced, and residual stress inthe sealing resin is reduced.

[0379] The remaining advantages of the CSP18 according to the eighthembodiment and its method of manufacture are identical to those of theCSP12 of the second embodiment, so their description will not berepeated.

[0380] Embodiment 9

[0381]FIG. 30 is a plan view through the sealing parts of a typicalstructure of a semiconductor device (CSP) according to a ninthembodiment of this invention. FIGS. 31(a) to 31(c) are diagrams showingthe structure of the semiconductor device shown in FIG. 30. FIG. 31(a)is a cross-sectional view through a line A-A in FIG. 30, FIG. 31(b) is across-sectional view through a line B-B in FIG. 30, FIG. 31(c) is across-sectional view through a line C-C in FIG. 30.

[0382] A CSP19 (semiconductor device) according to the ninth embodimentis a peripheral pad fan-in CSP as is the CSP18 of the eighth embodimentshown in FIG. 28. It has a substantially identical structure to that ofthe CSP18, however a difference from the CSP18 of the eighth embodimentis that the dam pieces 34 provided on the surfaces of the substrateprotruding parts 4 b of the thin film wiring substrate 4 on the chipmounting side, are formed in the shape of a frame surrounding the entireperiphery of the substrate protruding parts 4 b.

[0383] The elastomer 3 in the CSP19 according to the ninth embodimentdoes not therefore comprise the elastomer protruding parts 3 b (FIG.28).

[0384] As the dam pieces 34 are formed in the shape of a frame over thewhole outer periphery of the substrate protruding parts 4 b, in theCSP19 according to the ninth embodiment, the resin sealing 28 isperformed over all the four side faces 1 c of the semiconductor chip 1.

[0385] The remaining features of the construction of the CSP14 accordingto the fourth embodiment and of its method of manufacture are identicalto those of the CSP13 of the third embodiment, so their description willnot be repeated.

[0386] The advantages of the CSP14 of the fourth embodiment and itsmethod of manufacture are as follows.

[0387] In the CSP19, as all of the surfaces of the elastomer 3 arecovered, the same advantages as when the side faces 3 a of the elastomer3 are exposed cannot be obtained. However as all of the side faces 1 c,3 a of the semiconductor chip 1 and elastomer 3 are covered so as toform the sealing parts 5, and all of the peripheral sealing parts 5 aredirectly joined to the substrate protruding parts 4 b of the thin filmwiring substrate 4, the seal properties (humidity resistance) of the

[0388] semiconductor chip 1 are improved.

[0389] The remaining advantages of the CSPl9 according to the ninthembodiment and its method of manufacture are identical to those of theCSP18 of the eighth embodiment, so their description will not berepeated.

[0390] Embodiment 10

[0391]FIG. 32 is a plan view through the sealing parts of a typicalstructure of a semiconductor device (CSP) according to a tenthembodiment of this invention. FIGS. 33(a) to 33(c) are diagrams showingthe structure of the semiconductor device shown in FIG. 32. FIG. 33(a)is a cross-sectional view through a line A-A in FIG. 32, FIG. 33(b) is across-sectional view through a line B-B in FIG. 32, FIG. 33(c) is across-sectional view through a line C-C in FIG. 32.

[0392] A CSP40 (semiconductor device) according to the tenth embodimentis a peripheral pad fan-in CSP as is the CSP16 of the sixth embodimentshown in FIG. 22. It has a substantially identical structure to that ofthe CSP16, however a difference from the CSP16 of the sixth embodimentis that seal openings 4 m, 3 f are provided at positions correspondingto the two opposite side faces 1 c in the longitudinal direction of thesemiconductor chip 1 (FIG. 33(c)) in the substrate protruding parts 4 bof the thin film wiring substrate 4 and in the elastomer protrudingparts 3 b of the elastomer 3 in addition to the

[0393] openings 4 e exposing the electrode pads 1 b, as shown in FIG.32.

[0394] Specifically, the two opposite openings 4 e and the two oppositeopenings 3 c are provided at positions exposing the electrode pads 1 bon both sides of the semiconductor chip 1, the two seal openings 4 m andthe two seal openings 3 f are provided at opposite positions in adirection at right angles to the openings 4 e, 3 c, and the thin filmwiring substrate 4 and elastomer 3 are formed in substantially the sameshape.

[0395] Hence, when the resin sealing 28 shown in FIG. 4 is performed,sealing resin can be applied through the openings 4 e, the openings 3 c,the seal openings 4 m and the seal openings 3 f from the top surface ofthe thin film wiring substrate 4.

[0396] Therefore, the four side faces 1 c of the semiconductor chip 1can be covered by sealing resin by this bonding method.

[0397] Further, as the elastomer 3 comprises the elastomer protrudingparts 3 b which protrude beyond the four sides of the semiconductor chip1, the resin sealing 28 can be performed on all the four side faces 1 cof the semiconductor chip 1.

[0398] The remaining features of the construction of the CSP40 accordingto the tenth embodiment and of its method of manufacture are identicalto those of the CSP16 of the sixth embodiment, so their description willnot be repeated.

[0399] The advantages of the CSP40 of the tenth embodiment and of itsmethod of manufacture are as follows.

[0400] In the CSP40, as all the four side faces 1 c of the semiconductorchip 1 are sealed, the seal properties (humidity resistance) of thesemiconductor chip 1 are improved.

[0401] Also, as leakage of sealing resin in the resin sealing step 28 isprevented by the elastomer protruding parts 3 b, sealing resin is notcut in the cutting step 33, and the contour of the CSP40 can be madecompact.

[0402] As sealing resin can be applied to four positions, i.e. one ofthe openings 3 c, one of the openings 4 e, the seal opening 3 f and theseal opening 4 m, from the same direction, the sealing step is madeeasier and productivity is improved.

[0403] The remaining advantages of the CSP40 according to the tenthembodiment and of its method of manufacture are identical to those ofthe CSP16 of the sixth embodiment, so their description will not berepeated.

[0404] Embodiment 11

[0405]FIG. 34 is a plan view through the sealing parts of a typicalstructure of a semiconductor device (CSP) according to an eleventhembodiment of this invention. FIGS. 35(a) to 35(c) are diagrams showingthe structure of the semiconductor device shown in FIG. 34. FIG. 35(a)is a cross-sectional view through a line A-A in FIG. 34, FIG. 35(b) is across-sectional view through a line B-B in FIG. 34, FIG. 35(c) is across-sectional view through a line C-C in FIG. 34.

[0406] A CSP41 (semiconductor device) according to the eleventhembodiment is a peripheral pad fan-in CSP as is the CSP40 of the tenthembodiment shown in FIG. 32. It has a substantially identical structureto that of the CSP40, however a difference from the CSP40 of the tenthembodiment is that when the CSP41 is assembled, the elastomer 3 isformed sufficiently thicker than the elastomer 3 of the CSP40 to theextent that the four side faces 1 c of the semiconductor chip 1 aresurrounded by the protruding parts 3 b of the elastomer 3 via thesealing parts 5, as shown in FIG. 35.

[0407] In the CSP41, the elastomer 3 is formed of a porous fluorideresin so that it can be formed thick.

[0408] Hence, in the CSP41 of the eleventh embodiment, the semiconductorchip 1 is attached so that the outer side faces 1 c on its outerperiphery are surrounded by the elastomer protruding parts 3 b of theelastomer 3 via the sealing parts 5, as shown in FIG. 35(c).

[0409] Herein, the method of attaching (fixing) the semiconductor chip 1shown in FIG. 35(c) will be described.

[0410] To perform the chip attachment 24 shown in FIG. 4, thesemiconductor chip 1 is pushed into the elastomer 3 by making use of thefact that the elastomer 3 is a porous fluoride resin.

[0411] As the elastomer 3 is a porous fluoride resin, it can be easilydepressed under a comparatively small load.

[0412] The thickness of the elastomer 3 directly underneath thesemiconductor chip 1 can therefore be made much smaller than thethickness of the outer periphery of the semiconductor chip 1.

[0413] As a result, the semiconductor chip 1 can be formed into astructure wherein the side faces 1 c on the outer periphery aresurrounded by the elastomer protruding parts 3 b formed all around theperiphery.

[0414] Sealing resin is then applied through the openings 4 e of thethin film wiring substrate 4 and the openings 3 c of the elastomer 3,and through the seal openings 4 m of the thin film wiring substrate 4and the seal openings 3 f of the elastomer 3.

[0415] The sealing parts 5 are thereby formed as a bridge between theperiphery of the main surface 1 a of the semiconductor chip 1 and thefour side faces 1 c, and between the substrate protruding parts 4 b,elastomer protruding parts 3 b and semiconductor chip 1.

[0416] The remaining features of the construction of the CSP41 accordingto the eleventh embodiment and of its method of manufacture areidentical to those of the CSP40 of the tenth embodiment, so theirdescription will not be repeated.

[0417] The advantages of the CSP41 of the eleventh embodiment and itsmethod of manufacture are as follows.

[0418] In the CSP41, as the elastomer 3 is a porous fluoride resin, andas the thickness of the elastomer 3 directly underneath thesemiconductor chip 1 can be made much smaller than that of the outerperiphery of the semiconductor chip 1, the semiconductor chip 1 can beattached so that the side faces 1 c on the outer periphery of thesemiconductor chip 1 are surrounded by the elastomer protruding parts 3b.

[0419] Hence, flow of sealing resin to the outside during the resinsealing step 28 of FIG. 4 is prevented by the elastomer protruding parts3 b and it is unnecessary to cut the sealing resin, so the CSP41 may bemade compact.

[0420] The remaining advantages of the CSP41 according to the eleventhembodiment and its method of manufacture are identical to those of theCSP40 of the tenth embodiment, so their description will not berepeated.

[0421] Embodiment 12

[0422]FIG. 36 is a plan view through the sealing parts of a typicalstructure of a semiconductor device (CSP) according to a twelfthembodiment of this invention. FIGS. 37(a) to 37(c) are diagrams showingthe structure of the semiconductor device shown in FIG. 36. FIG. 37(a)is a cross-sectional view through a line A-A in FIG. 36, FIG. 37(b) is across-sectional view through a line B-B in FIG. 36, FIG. 37(c) is across-sectional view through a line C-C in FIG. 36.

[0423] A CSP42 (semiconductor device) according to the twelfthembodiment is a peripheral pad fan-in CSP as is the CSP40 of the tenthembodiment shown in FIG. 32. It has a substantially identical structureto that of the CSP40, however a difference from the CSP40 of the tenthembodiment is that the electrode pads 1 b are formed on the periphery ofthe four sides of the main surface 1 a of the semiconductor chip 1.

[0424] As the four openings 4 e and four openings 3 c are respectivelyformed in the thin film wiring substrate 4 and elastomer 3 atcorresponding identical positions, the electrode pads 1 b on the foursides of the semiconductor chip 1 can be exposed by these openings 4 e,3 c.

[0425] Sealing resin is applied through these four holes 4 e, 3 c in theresin sealing step 28 so as to form the sealing parts 5 around the fouropenings 4 e, 3 c.

[0426] The remaining features of the construction of the CSP42 accordingto the twelfth embodiment and of its method of manufacture are identicalto those of the CSP40 of the tenth embodiment, so their description willnot be repeated.

[0427] The advantages of the CSP42 of the twelfth embodiment and itsmethod of manufacture are as follows.

[0428] In the CSP42, even when the electrode pads 1 b are provided onthe periphery of the four sides of the main surface 1 a of thesemiconductor chip 1, the four openings 4 e and the four openings 3 care respectively formed in the thin film wiring substrate 4 andelastomer 3. Therefore, by performing the resin sealing 28 through thefour openings 4 e and the four openings 3 c, the humidity resistance ismade more reliable, and a compact CSP42 can be obtained.

[0429] The remaining advantages of the CSP42 according to the twelfthembodiment and its method of manufacture are identical to those of theCSP40 of the tenth embodiment, so their description will not berepeated.

[0430] Embodiment 13

[0431]FIG. 38 is a plan view through the sealing parts of a typicalstructure of a semiconductor device (CSP) according to a thirteenthembodiment of this invention. FIGS. 39(a) to 39(c) are diagrams showingthe structure of the semiconductor device shown in FIG. 38. FIG. 39(a)is a cross-sectional view through a line A-A in FIG. 38, FIG. 39(b) is across-sectional view through a line B-B in FIG. 38, FIG. 39(c) is across-sectional view through a line C-C in FIG. 38.

[0432] A CSP43 (semiconductor device) according to the thirteenthembodiment is a peripheral pad fan-in CSP as is the CSP17 of the seventhembodiment shown in FIG. 24. It has a substantially identical structureto that of the CSP17, however a difference from the CSP17 of the seventhembodiment is that the electrode pads 1 b are provided on theperipheries of the four sides of the main surface 1 a of thesemiconductor chip 1.

[0433] Therefore, the four openings 4 e and the four openings 3 c areformed at corresponding positions in the thin film wiring substrate 4and the elastomer 3 so that the electrode pads 1 b on the four sides ofthe semiconductor chip 1 are exposed.

[0434] Sealing resin is then applied via the four openings 4 e and thefour openings 3 c in the resin sealing step 28 so as to form the sealingparts 5 in the four openings 4 e, 3 c.

[0435] The remaining features of the construction of the CSP43 accordingto the thirteenth embodiment and of its method of manufacture areidentical to those of the CSP17 of the seventh embodiment, so theirdescription will not be repeated.

[0436] The advantages of the CSP43 of the thirteenth embodiment and ofits method of manufacture are as follows.

[0437] In the CSP43, by forming the four openings 4 e and the fouropenings 3 c respectively in the thin film wiring substrate 4 and theelastomer 3, a compact CSP43 having improved humidity resistance can beobtained even if the electrode pads 1 b are provided on the peripheriesof the four sides of the main surface 1 a of the semiconductor chip 1.

[0438] As the sealing resin can be applied to all of the four openings 4e, 3 c from the same direction in the resin sealing step 28, the sealingstep is made easier and productivity is improved.

[0439] Further, as the four side faces 1 c of the semiconductor chip 1are sealed by the elastomer protruding parts 3 b or the sealing parts 5,the seal properties (humidity resistance) of the semiconductor chip 1are improved.

[0440] The remaining advantages of the CSP43 according to the thirteenthembodiment and of its method of manufacture are identical to those ofthe CSP17 of the seventh embodiment, so their description will not berepeated.

[0441] Embodiment 14

[0442] FIGS. 40(a) to 40(c) are diagrams of a typical structure of theunconnected lead of a semiconductor device according to a fourteenthembodiment of this invention. FIG. 40(a) is a cross-sectional view whenthe unconnected lead is bent, FIG. 40(b) and FIG. 40(c) arecross-sectional views when the unconnected lead is not bent.

[0443] According to the fourteenth embodiment, the semiconductor device(CSP) shown in Embodiments 1 to 13 has an unconnected lead 35 (one ofthe leads 4 c which is not connected to the electrode pads 1 b of thesemiconductor chip 1). This unconnected lead 35 may or may not be bent.

[0444] Due to the unconnected lead 35, the mode of the CSP can bechanged over to change over functions, and different wiringconfigurations 4 d can be set up by selecting connection or noconnection for each of the leads 4 c for the same wiring pattern.

[0445] Therefore if no connection is selected for the lead 4 c, i.e. forthe unconnected lead 35, no connection of any kind is performed by thebonding tool (FIG. 13) in the bonding step.

[0446] The CSP17 shown in Embodiment 7 will be taken as an example todescribe the unconnected lead 35 shown in FIG. 40.

[0447] It will however be understood that the same features can beapplied not only to the seventh embodiment, but to any of the first tothirteenth embodiments.

[0448] In the CSP17 shown in FIG. 40(a), the unconnected lead 35 is benttowards the electrode pad 1 b of the semiconductor chip 1.

[0449] In this process, instead of making a connection with the bondingtool 7 in the bonding step, the lead 4 c is pressed down by the bondingtool 7 (i.e. in the direction of the main surface 1 a of thesemiconductor chip 1) to the extent that it does not touch the electrodepad 1 b.

[0450] In both FIGS. 40(b) and (c), the unconnected lead 35 is not bent.

[0451] The CSP17 shown in FIG. 40(b) represents a state where theunconnected lead 35 which is not bent is enclosed inside the sealingpart 5.

[0452] The CSP17 shown in FIG. 40(c) represents a state where the tip ofthe unconnected lead 35 which is not bent protrudes beyond the sealingpart 5. As the surface of the sealing part 5 is somewhat depressed whenthe sealing resin is cured, the unconnected lead 35 is left projecting.

[0453] From the viewpoint of sealing properties, when the semiconductordevice (CSP) comprises the unconnected lead 35, it is desirable that theunconnected lead 35 is bent in the direction of the main surface of thesemiconductor chip 1 as shown in FIG. 40(a), but it is not absolutelynecessary to bend it and it may be unbent as shown in FIGS. 40(b),40(c).

[0454] The remaining features of the construction of the semiconductordevice (CSP) according to the fourteenth embodiment are identical tothose of the first-thirteenth embodiments, so their description will notbe repeated.

[0455] The CSP does not necessarily comprise the unconnected lead 35described in the fourteenth embodiment, this unconnected lead 35 beingused depending on the function of the CSP.

[0456] It will be understood that the unconnected lead can also be usednot only in the seventh embodiment, but also in any of thefirst-thirteenth embodiments.

[0457] Next, the effect obtained by the semiconductor device (CSP)according to the fourteenth embodiment will be described.

[0458] In the CSP, a desired circuit can be constructed by selecting theconnected/unconnected leads 4 c using a common pattern, so it isunnecessary to provide separate wiring patterns for each product.

[0459] Hence common parts may be used for different CSP, and as aresult, the CSP can be manufactured at lower cost.

[0460] When the CSP has the unconnected lead 35, by bending theunconnected lead 35 towards the electrode pad 1 b of the semiconductorchip 1, the unconnected lead 35 is not left exposed outside the sealingpart 5 after resin sealing, so humidity resistance is improved.

[0461] Also, by bending the unconnected lead 35 towards the electrodepad 1 b of the semiconductor chip 1, the unconnected lead 35 can befirmly sealed inside the sealing part 5 even when the surface of thesealing part 5 is depressed.

[0462] This reduces the limitations on the sealing resin and increasesthe number of sealing resins that can be used.

[0463] Embodiment 15

[0464] FIGS. 41(a), 41(b), 41(c) are cross-sectional views showing atypical structure using a single layer surface wiring thin film wiringsubstrate in a semiconductor device according to a fifteenth embodimentof this invention, and FIGS. 42(a), 42(b), 42(c) are cross-sectionalviews using a two-layer wiring thin film wiring substrate in asemiconductor device according to the fifteenth embodiment of thisinvention.

[0465] First, whereas the wiring 4 d of the thin film wiring substrate 4in the semiconductor device (CSP) according to the first-fourteenthembodiments was single layer wiring formed only on the reverse side ofthe tape base material (elastomer side), according to the fifteenthembodiment the thin film wiring substrate 4 is either single layersurface wiring wherein the wiring is formed only on the surface side ofthe

[0466] tape (bump electrode side), or two layer wiring. This will now bedescribed using the first embodiment (CSP11), second embodiment (CSP12)and seventh embodiment (CSP17) as examples.

[0467] First, FIG. 41 shows the case where the thin film wiringsubstrate 4 is single layer surface wired. FIG. 41(a) shows the casewhere the external structure of the semiconductor device is that of thetape (e.g. the CSP11 of the first embodiment). FIG. 41(b) shows the casewhere the external structure of the semiconductor device is that of asealed contour (e.g. the CSP12 of the second embodiment) FIG. 41(c)shows the case where the external structure of the semiconductor deviceis that of the elastomer (e.g. the CSP17 of the seventh embodiment).

[0468] Herein, the single layer surface wiring is the wiring 4 d formedon the top surface of the tape base material 4 g of the thin film wiringsubstrate 4, and a solder resist 4 r which is an insulating coating ofapproximately 10 to 30 μm thickness is formed at points excluding thebump lands 4 f on the tape base material 4 g (FIG. 27).

[0469] By using this single layer surface wiring, as the thickness ofthe solder resist 4 r is only 10 to 30 μm which is relatively thin,solder corrosion in the region of the joins of the bump lands of thebump electrodes 2 is suppressed, and unevenness in the attachment heightof the bump electrodes 2 is reduced.

[0470]FIG. 42 shows the case where the thin film wiring substrate 4 hastwo layer wiring. FIG. 41(a) shows the case where the external structureof the semiconductor device is that of the tape (e.g. the CSP11 of thefirst embodiment). FIG. 41(b) shows the case where the externalstructure of the semiconductor device is that of a sealed contour (e.g.the CSP12 of the second embodiment). FIG. 41(c) shows the case where theexternal structure of the semiconductor device is that of the elastomer(e.g. the CSP17 of the seventh embodiment).

[0471] In the case of two layer wiring, the wiring 4 d is formed on thetop surface and reverse side of the tape base material 4 g of the thinfilm wiring substrate. The wiring 4 d of the top and reverse sides iselectrically connected by through holes 4 w, and a solder resist 4 rwhich is an insulating coating of approximately 10 to 30 μm thickness isformed at points excluding the bump lands 4 f on the top surface of thetape base material 4 g.

[0472] The remaining features of the construction of the semiconductordevice (CSP) according to the fifteenth embodiment are identical tothose of the first to fourteenth embodiments, so their description willnot be repeated.

[0473] The CSP does not necessarily have both the single layer surfacewiring and the two-layer wiring described in the fifteenth embodiment,and may have only the single layer surface wiring. Also, it isunderstood that these features may be applied not only to the first,second and seventh embodiments, but to any of the first to fourteenthembodiments.

[0474] According to the fifteenth embodiment, even when the number ofbump electrodes 2 increases and complex wiring has to be performed, thewiring 4 d is formed on the both the top and reverse sides of the tapebase material 4 g via the through holes 4 w so that the complex wiringis possible.

[0475] As a result, the CSP can be manufactured even when the number ofbump electrodes 2 increases.

[0476] Embodiment 16

[0477] FIGS. 43(a), 43(b), 43(c), 43(d) are enlarged partialcross-sections showing an example of a lead tip processing sequence in asemiconductor device manufacturing method according to a sixteenthembodiment of this invention, as follows:

[0478]FIG. 43(a) before bonding

[0479]FIG. 43(b) during bonding

[0480]FIG. 43(c) after bonding

[0481]FIG. 43(d) after sealing

[0482] FIGS. 44(a) to (c) and FIGS. 45(a) to (c) are enlarged partialcross-sections showing another example of a lead tip processing sequencein a method of manufacturing a semiconductor device for comparison withthe lead tip processing shown in FIG. 43.

[0483]FIG. 44(a) before bonding

[0484]FIG. 44(b) during bonding

[0485]FIG. 44(c) after sealing

[0486]FIG. 45(a) before bonding

[0487]FIG. 45(b) during bonding

[0488]FIG. 45(c) after sealing

[0489] The sixteenth embodiment concerns the tip processing of the leads4 c during bonding in the semiconductor device (CSP) shown in the firstto fifteenth embodiments.

[0490] The sixteenth embodiments will be described using the CSP17described in the seventh embodiment as an example.

[0491] First, in the comparative example shown in FIG. 44, as a distanceP shown in FIG. 44(a) is relatively long, the bonding tool 7 is moved(lowered) to perform bonding as shown in FIG. 44(b), and then the resinsealing 28 (FIG. 4) is performed to form the sealing part 5 as shown inFIG. 44(c) without tip processing of the leads 4 c.

[0492] In this case, as the distance P shown in FIG. 44(a) is relativelylong, the whole tip of the lead 4 c after bonding is completely enclosedwithin the sealing part 5 as shown in FIG. 44(c).

[0493] In the comparative example shown in FIG. 45, the distance P shownin FIG. 45(a) is relatively short. The bonding tool 7 is moved (lowered)to perform bonding as shown in FIG. 45(b) and the resin sealing 28 (FIG.4) is performed to form the

[0494] sealing part 5 as shown in FIG. 44(c) without tip processing ofthe lead 4 c.

[0495] In this case, as the distance P shown in FIG. 45(a) is relativelyshort, tip processing of the lead 4 c after bonding is not performed asshown in FIG. 45(b), so the tip of the lead 4 c after bonding protrudesbeyond the sealing part 5 so that it is exposed as shown in FIG. 45(c).

[0496] On the other hand, in the CSP17 of the sixteenth embodiment shownin FIG. 43, the bonding tool 7 is lowered straight down toward theelectrode pad 1 b of the semiconductor chip 1, and the electrode pad 1 band the lead 4 c of the thin film wiring substrate 4 are thenelectrically connected by the pressing action of the bonding tool 7, asshown in FIG. 43(b). The bonding tool 7 is then moved in the directionof the tip of the lead 4 c (horizontal displacement) effectivelyparallel to the main surface 1 a of the semiconductor chip 1, as shownin FIG. 43(c).

[0497] Specifically, after bonding, the pressure of the bonding tool 7is removed, and the tip of the bonding tool 7 is displaced by apredetermined amount (e.g. 10 to 300 μm, but preferably 30 to 200 μm) inthe direction of the tip of the lead 4 c, then the resin sealing step 28is performed so as to form the sealing part 5 as shown in FIG. 43(d).

[0498] The splash angle near the tip of the lead 4 c can therefore bemade small.

[0499] When the tip processing of the lead 4 c is performed, the bondingtool 7 may first be raised by a predetermined amount (e.g. 5 to 100 μm,but preferably 10 to 60 μm) at the same time as the pressure of thebonding tool 7 is removed, and then displaced horizontally by thepredetermined amount (e.g. 10 to 300 μm, but preferably 30 to 200 μm) inthe direction of the tip of the lead 4 c.

[0500] Regarding the tip processing of the lead 4 c, the bonding tool 7may be moved by the predetermined amount (e.g. 10 to 300 μm, butpreferably 30 to 200 μm) in the direction of the tip of the lead 4 conly when at least the distance P is relatively short compared to alength L of the projecting lead 4 c and a thickness E of the elastomer 3(e.g. P≦L−E, but preferably P≦L−E−100 μm) When the conditions regardingP, L, E shown in FIG. 43(a) are not satisfied, it is not necessary toperform tip processing of the lead 4 c.

[0501] It will moreover be appreciated that it is not particularlynecessary to perform tip processing of the lead 4 c regardless of thedistance P, length L and thickness E shown in FIG. 43(a).

[0502] The remaining features of the construction of the semiconductordevice (CSP) according to the sixteenth embodiment are identical tothose of the CSP shown in the first-fifteenth embodiments, so theirdescription will not be repeated.

[0503] The tip processing of the lead 4 c described in the sixteenthembodiment is not indispensable, and may be omitted.

[0504] It is understood that these features may be applied not only tothe seventh embodiment, but also to any of the first to fifteenthembodiments.

[0505] According to the sixteenth embodiment, regarding connection ofthe lead 4 c, the tip of the extra length of the lead 4 c is preventedfrom protrudeing more than is necessary above the top surface (mainsurface 1 a) of the semiconductor chip 1 regardless of the positions ofthe electrode pad 1 b on the semiconductor chip 1 even when a lead 4 cthat is longer the required length is bonded.

[0506] Hence, the tip of the lead 4 c is prevented from being exposedoutside the sealing part even after the sealing part 5 has been formedby the resin sealing 28 of the lead 4 c and electrode pad 1 b, and as aresult, the humidity resistance of the semiconductor device (CSP17) ismore reliable.

[0507] Embodiment 17

[0508]FIG. 46 shows an elastomer specification showing a typical colorspecification of the elastomer (elastic structure) used in thesemiconductor device (CSP) according to a seventeenth embodiment of thisinvention.

[0509] In this seventeenth embodiment, the case will be described wherea colored elastomer is used for the semiconductor device (CSP) shown inthe first to sixteenth embodiments.

[0510] Specifically, the elastomer 3 of the CSP in the first tosixteenth embodiments is colorless, and it is an effectively transparentbody which transmits light.

[0511] On the other hand, the elastomer 3 (elastic structure) of theseventeenth embodiment comprises a coloring agent in the adhesive layer3 e formed on both sides of the skeleton layer 3 d (FIG. 47 describedhereafter).

[0512] Specific examples of the specification of the colored elastomer 3are the specification (1) and specification (2) shown in FIG. 46. Thecoloring agent used here is carbon.

[0513] In the colored elastomer specifications (1) and (2) shown in FIG.46, the adhesive layer 3 e on both sides of the skeleton layer 3 dcontains the coloring agent, however the invention is not limited tothis arrangement and the adhesive layer 3 e on only one side may containthe coloring agent.

[0514] In the specifications (1) and (2) shown in FIG. 46 of theseventeenth embodiment, the adhesive layers 3 e contain the coloringagent, however the intermediate layer which is the skeleton layer 3 dmay also contain the coloring agent, or both the adhesive layer 3 e andthe skeleton layer 3 d may contain the coloring agent.

[0515] In other words, it is sufficient if at least one of the partscomprising the elastomer 3 contains the coloring agent.

[0516] In the specifications (1) and (2) shown in FIG. 46, the coloringagent was carbon particles, however the coloring material is not limitedto this and may be another inorganic pigment or organic dye.

[0517] In the specification (1) and (2) shown in FIG. 46, the coloringagent is black carbon, but the coloring agent may be red, blue, green,pink, yellow or another color, or an intermediate color.

[0518] The remaining features of the construction of the semiconductordevice (CSP) according to the seventeenth embodiment are identical tothose of the CSP shown in the first-sixteenth embodiments, so theirdescription will not be repeated.

[0519] It should be noted that it is not absolutely necessary for theelastomer 3 in the CSP of the seventeenth embodiment to contain acoloring agent.

[0520] However, by arranging for the elastomer 3 to contain apredetermined amount of coloring agent according to the seventeenthembodiment, the transmittance of the elastomer 3 can be lowered withoutaffecting basic properties of the elastomer 3 such as elastic modulus,thermal expansion coefficient, flame-retarding properties and humidityabsorption.

[0521] In this way, the circuit of the semiconductor chip 1 may beobscured from light.

[0522] As a result, ultraviolet radiation, etc. which may causeincorrect operation of the semiconductor chip 1 can be blocked, andstability of the electrical circuit of the CSP is enhanced.

[0523] By using carbon as coloring agent, a predetermined lightobscuring effect may be obtained by a small addition amount, sodeterioration of the basic characteristics of the elastomer 3 may besuppressed to the minimum.

[0524] Also, by incorporating the coloring, agent in at least one of theadhesive layers 3 e rather than the skeleton layer 3 d of the elastomer3, the elastomer 3 can be colored at low cost.

[0525] Embodiment 18

[0526] FIGS. 47(a) to 47(h) are component charts showing examples of thedetailed composition of an elastomer in a semiconductor device accordingto an eighteenth embodiment of this invention. FIGS. 48(a) to 48(e) arecomponent charts showing examples of the detailed composition of anelastomer in a semiconductor device according to the eighteenthembodiment of this invention. FIGS. 48(a) to 48(d) show 3-layerstructures, and FIG. 48(e) shows a 5-layer structure.

[0527] Embodiment 18 concerns specific materials of each component ofthe elastomer 3 in the semiconductor device (CSP) of thefirst-seventeenth embodiments.

[0528] Herein, FIGS. 47 and 48(a) to 48(d) show the case where theelastomer 3 comprises three layers, and FIG. 48(e) shows the case wherethe elastomer 3 comprises five layers.

[0529] In the five layer structure, other thin adhesive layers 3 e areformed between the skeleton layer 3 d and the two (outermost) adhesivelayers 3 e. According to the eighteenth embodiment, a specific exampleof this five layer structure is shown in FIG. 48(e), but in FIG. 47 andFIG. 48, it is particularly effective to use this five layer structurewhen film layers are formed on both sides of the skeleton layer 3 dinstead of coating layers in the elastomer 3.

[0530] In an elastomer 3 wherein the outer upper and lower layers arefilm layers, the use of this five layer structure further reduces therigidity of the film layers (adhesive layers 3 e).

[0531] As a result, the rigidity of the elastomer 3 is also reduced, sothe elastomer easily molds to the contour of the leads 4 c and thecontact of the elastomer 3 is improved. Herein, the materials of eachcomponent of the elastomer 3 are not limited to those of the eighteenthembodiment shown in FIG. 47 and FIG. 48, and the elastomer may also be amulti-layer structure wherein the number of layers is not limited tothree or five.

[0532] It is preferable that a porous material (for detailed structureof this porous material, refer to the first embodiment) comprising a3-dimensional mesh structure is used for the skeleton layer 3 d.

[0533] The remaining features of the construction of the semiconductordevice (CSP) according to the eighteenth embodiment are identical tothose of the CSP shown in the first to seventeenth embodiments, so theirdescription will not be repeated.

[0534] Embodiment 19

[0535] FIGS. 49(a), (b) are diagrams showing typical thicknesses of theskeleton layer and adhesive layers in an elastomer of a semiconductordevice according to a nineteenth embodiment of this invention.

[0536] The nineteenth embodiment concerns the thicknesses of theadhesive layers 3 e (FIG. 47 and FIG. 48) and the skeleton layer 3 d inthe elastomer (elastic structure) of the semiconductor device (CSP)shown in the first to eighteenth embodiments.

[0537]FIG. 49 shows the case where the elastomer 3 comprises threelayers.

[0538] First, in the elastomer 3, the thickness of the tape sideadhesive layer 3 g is made thicker than the wiring 4 d of the tape basematerial 4 g (e.g. at least 1.2 times or at least 1.5 times).

[0539] Specifically, when for example the thickness of the wiring 4 d is18 μm, the thickness of the tape side adhesive layer 3 g is at least21.6 μm or preferably at least 27 μm.

[0540] Further, when for example the thickness of the wiring 4 d is 25μm, the thickness of the tape side adhesive layer 3 g is at least 30 μmor preferably at least 37.5 μm.

[0541]FIG. 49(a) shows the case where the tape side adhesive layer 3 g(adhesive layer adjacent to thin film wiring substrate) and the chipside adhesive layer 3 h have the same thickness. As an example, thethickness of these two layers is 30 μm and the thickness of the skeletonlayer 3 d which is the intermediate layer is 100 μm.

[0542] If for example the thickness of the wiring 4 d is 18 μm, as thethickness of the upper and lower adhesive layers 3 e (herein, the tapeside adhesive layer 3 g and chip side adhesive layer 3 h) is 30 μm, andthe thickness of the skeleton layer 3 d is 100 μm, the total thicknessof the elastomer 3 is 160 μm.

[0543]FIG. 49(b) shows the case where the tape side adhesive layer 3 g(adhesive layer adjacent to thin film wiring substrate) is thicker thanthe chip side adhesive layer 3 h. As an example, the thickness of thetape side adhesive layer 3 g is 75 μm, the thickness of the chip sideadhesive layer 3 h is 50 μm, and the thickness of the skeleton layerwhich is the intermediate layer is 25 μm.

[0544] If for example the thickness of the wiring 4 d is 18 μm, as thethickness of the tape side adhesive layer 3 g is 75 μm, the thickness ofthe chip side adhesive layer 3 h is 50 μm and the thickness of theskeleton layer 3 d is 25 μm, the total thickness of the elastomer 3 is150 μm.

[0545] It should be noted that the thicknesses given in FIG. 49 are onlyexamples, and the invention is not limited to them.

[0546] The remaining features of the construction of the semiconductordevice (CSP) according to the nineteenth embodiment are identical tothose of the CSP shown in the first to eighteenth embodiments, so theirdescription will not be repeated.

[0547] Moreover, the thickness of the tape side adhesive layer 3 g andthe chip side adhesive layer 3 h may be identical or different.

[0548] According to the nineteenth embodiment, by arranging thethickness of the tape side adhesive layer 3 g to be greater (e.g. atleast 1.2 times or at least 1.5 times) than the thickness of the wiring4 d, undulations due to the wiring 4 d on the adhesive surface of thetape side base material 4 g can be covered, and as a result, the contactof the tape side adhesive layer 3 g is improved.

[0549] This gives a CSP of high reliability.

[0550] Also, by arranging the tape side adhesive layer 3 g and chip sideadhesive layer 3 h to have the same thickness, contact between the tapebase material 4 g and semiconductor chip 1 is improved, and a highefficiency, low cost elastomer 3 can be manufactured.

[0551] Finally, by arranging the thickness of the tape side adhesivelayer 3 g to be greater than the thickness of the chip side adhesivelayer 3 h, even better contact can be obtained with the undulations ofthe tape side adhesive layer 3 g due to the wiring 4 d within thethickness conditions determined for the elastomer overall. As a result,good adhesion is obtained and a CSP of high reliability can bemanufactured.

[0552] Embodiment 20

[0553]FIG. 50 is a base plane diagram showing the structure of the undersurface of a semiconductor device according to a twentieth embodiment ofthis invention.

[0554] The twentieth embodiment concerns the width of the wiring 4 d inthe thin film wiring substrate 4 in the semiconductor device (CSP) shownin the first to nineteenth embodiments.

[0555] The twentieth embodiment will be described taking the CSP17 ofthe seventh embodiment as an example.

[0556] In the CSP17 shown in FIG. 50, the wiring width of connectingparts 4 s which connect with the bump lands 4 f of the wiring 4 d formedin the thin film wiring substrate 4, is formed wider than the wiringwidth of the wiring 4 d at points remote from the connecting parts 4 s,and the wiring width of the connecting parts 4 s progressively becomesnarrower with increasing distance from the bump lands 4 f.

[0557] Specifically, in the wiring 4 d reaching the leads 4 c from thebump land 4 f formed in the tape base material 4 g (FIG. 27), the wiringwidth of the connecting parts 4 s which connect with the bump lands 4 fis wider than the wiring width of the wiring 4 d at points distant fromthese connecting parts 4 s, these parts tapering off so that the wiringwidth of the connecting part 4 s gradually becomes narrower withincreasing distance from the bump lands 4 f.

[0558] In the CSP17 shown in FIG. 50, the wiring width of all twelve ofthe connecting parts 4 s is formed wide, and these wide connecting parts4 s progressively become narrower with increasing distance from the bumplands 4 f.

[0559] The remaining features of the construction of the semiconductordevice (CSP) according to the twentieth embodiment are identical tothose of the CSP of the first to nineteenth embodiments, so theirdescription will not be repeated.

[0560] However, it is not absolutely necessary to form the connectingparts 4 s described in the twentieth embodiment, and they may beomitted.

[0561] Of the wiring formed on the tape base material 4 g, the wiring 4d protrudeing from the connecting parts 4 s which are connected to thebump lands 4 f immediately adjacent to the leads 4 c, is a relativelyshort distance away from the leads 4 c.

[0562] Therefore when a load acts on the leads 4 c and wiring 4 d,stress tends to concentrate in the connecting parts 4 s which areconnected to the bump lands 4 f immediately adjacent to the leads.

[0563] It is therefore desirable that when the connecting parts 4 s areformed, these connecting parts 4 s which are connected to the bump lands4 f immediately adjacent to the leads 4 c are formed wider than otherparts.

[0564] It is of course understood that the features of this inventionmay be applied not only to the seventh embodiment, but also to thefirst-nineteenth embodiments.

[0565] According to the twentieth embodiment, the connecting parts 4 sbetween the wiring 4 d and bump lands 4 f are formed wide, so stressdoes not easily concentrate in these connecting parts 4 s.

[0566] Hence during a temperature cycle, even if the tape base material4 g and wiring 4 d deform due to thermal contraction and expansion, theconnecting parts 4 s between the wiring 4 d and bump lands 4 f do notbreak.

[0567] Embodiment 21

[0568] FIGS. 51(a) to 51(d) are figures each showing a typical structureof a semiconductor device according to a twenty-first embodiment of thisinvention. FIG. 51(a) is a base plan view, FIG. 51(b) is a side view,FIG. 51(c) is a plan view of which part has been cut away, and FIG.51(d) shows a front view. FIGS. 52(a) to 52(c) are diagrams of theconstruction of the semiconductor device shown in FIG. 51. FIG. 52(a) isa cross-sectional view through a line A-A in FIG. 51. FIG. 52(b) is across-sectional view through a line B-B in FIG. 51. FIG. 52(c) is across-sectional view through a line C-C in FIG. 51. FIGS. 53(a) and53(b) are enlarged partial cross-sections of the structure of thesemiconductor device shown in FIG. 52. FIG. 53(a) is a view of a part Din FIG. 52(b), FIG. 53(b) is a view of a part E in FIG. 52(c), and FIGS.54(a) to 54(f) are diagrams each showing an example of a method ofmanufacturing a thin film wiring substrate used in the semiconductordevice according to the twenty-first embodiment of this invention. FIGS.54(a), 54(c), 54(e) are partial plan views, FIG. 54(b), 54(d), 54(f) arerespectively cross-sectional views showing a section through A-A. FIGS.55(a) to 55(d) are diagrams each showing an example of a method ofmanufacturing a thin film wiring substrate used in the semiconductordevice according to the twenty-first embodiment of this invention. FIGS.55(a), 55(c) are partial plan views, 55(b), 55(d) are respectivelycross-sectional views showing a section through A-A. FIGS. 56(a) to56(f) are diagrams each showing an example of a method of manufacturinga thin film wiring substrate used in the semiconductor device accordingto the twenty-first embodiment of this invention. FIGS. 56(a), 56(d) arepartial plan views, 56(b), 56(e) are respectively cross-sectional viewsshowing a section through A-A, 56(c), 56(f) are respectivelycross-sectional views showing a section through B-B. FIGS. 57(a) to57(f) are diagrams each showing an example of a method of manufacturinga thin film wiring substrate used in the semiconductor device accordingto the twenty-first embodiment of this invention. FIGS. 57(a), 57(d) arepartial plan views, 57(b), 57(e) are respectively cross-sectional viewsshowing a section through A-A, 57(c), 57(f) are respectivelycross-sectional views showing a section through B-B. FIGS. 58(a) to58(f) are diagrams each showing an example of a method of manufacturinga thin film wiring substrate used in the semiconductor device accordingto the twenty-first embodiment of this invention. FIGS. 58(a), (d) arepartial plan views, 58(b), 58(e) are respectively cross-sectional viewsshowing a section through A-A, 58(c), 58(f) are respectivelycross-sectional views showing a section through B-B.

[0569] A semiconductor device (CSP51) according to the twenty-firstembodiment is a peripheral pad type fan-in CSP identical to the CSP17 ofthe seventh embodiment shown in FIG. 24. It has a substantiallyidentical structure to that of the CSP17, however differences from theCSP17 of the seventh embodiment are that the thin film wiring substrate4 does not comprise the base protruding parts 4 b shown in FIG. 24, andthe elastomer 3 (FIG. 51(a)) which is an elastic structure comprisesexposed parts 3 i which are exposed to the outside, as shown in FIG.51(b).

[0570] Specifically, whereas the CSP of the first to twentiethembodiments is a structure wherein at least the thin film wiringsubstrate 4 comprises substrate protruding parts 4 b which protrudebeyond the periphery of the semiconductor chip 1, the CSP51 according tothe twenty-first embodiment is a structure wherein the thin film wiringsubstrate 4 does not comprise the substrate protruding parts 4 b.

[0571] The CSP51 therefore does not comprise the elastomer protrudingparts 3 b provided in the elastomer of the CSP17 shown in FIG. 24.

[0572] Herein, the detailed structure of the CSP51 according to thetwenty-first embodiment will be described.

[0573] The CSP51 comprises the elastomer 3 (elastic structure) providedwith the exposed parts 3 i arranged on the main surface 1 a of thesemiconductor chip 1 for exposing the electrode pads 1 b (connectionterminals), a substrate body 4 a provided with the wiring 4 d whereofone end is electrically connected to the electrode pads 1 b via theleads 4 c and the other ends are electrically connected to the bumpelectrodes 2 (external terminals), the thin film wiring substrate 4comprising the openings 4 e for exposing the electrode pads 1 b, and asealing part 5 for sealing the electrode pads 1 b of the semiconductorchip 1 and the thin film wiring substrate 4.

[0574] In the CSP51 shown in FIG. 51, 20 of the bump electrodes 2 areprovided.

[0575] The CSP51 comprises the exposed parts 3 i of the elastomer 3(FIG. 51(a)) on the two long side faces 51 a as shown in FIG. 51(b),there being four of the exposed parts 51 a on each of the two sides 51 aof the CSP51.

[0576] The remaining features of the construction of the semiconductordevice (CSP) according to the twenty-first embodiment are identical tothose of the CSP17 of the seventh embodiment, so their description willnot be repeated.

[0577] The method of manufacturing the CSP51 according to thetwenty-first embodiment will now be described.

[0578] First, as shown in FIG. 54 and FIG. 55, the elastomer 3 joined tothe substrate body 4 a comprising the wiring 4 d is manufactured, theopenings 4 e comprising the leads 4 c connected to the wiring 4 d areformed, and the thin film wiring substrate 4 (FIG. 55(c)) wherein thesubstrate body 4 a is supported in a substrate frame 4 t by supporters 3j of the elastomer 3 is prepared.

[0579] The method of manufacturing the thin film wiring substrate 4 willbe described referring to FIG. 54 and FIG. 55.

[0580] The tape base material 4 g comprising a polyimide resin shown inFIG. 54(a) is prepared. An adhesive is coated on the top surface, undersurface or both the top surface and under surface of the tape basematerial 4 g in order to attach the copper foil 4 h shown in FIG. 54(c).

[0581] Next, reference holes 4 i for tape feed are formed at anapproximately equal interval on both sides of the tape base material 4g.

[0582] Next, 20 of the bump openings 4 j are formed. Two of the wiringjoin openings 4 e and two of the long cutting holes 4 q are formed onboth sides by a punch die as shown in FIG. 54(a), and the copper foil 4h is laminated on the tape base material 4 g as shown in FIGS. 54(c),54(d).

[0583] The copper foil 4 h is formed into a desired shape by etching asshown in FIG. 54(e) so as to form the wiring pattern.

[0584] Next, the tape base material 4 g is attached to the elastomer 3as shown in FIGS. 55(a), 55(b).

[0585] The elastomer 3 used in the twenty-first embodiment comprisesfour long supporting members 3 j on each side (a total of eight on bothsides) as shown in FIG. 55(a). These supporting members 3 j straddle thefour long holes 4 q of the thin film wiring substrate 4 and aresufficiently long to reach the substrate frame 4 t.

[0586] However the number of the supporting members 3 j is not limitedto eight, and any number is permitted.

[0587] The number of these supporting members 3 j corresponds to thenumber of exposed parts 3 i of the CSP51.

[0588] Hence, the elastomer 3 is attached to the thin film wiringsubstrate 4, the body of the elastomer 3 is attached to the substratebody 4 a of the thin film wiring substrate 4, and the eight supportingmembers 3 j of the elastomer 3 are arranged to straddle the long holes 4q of the thin film wiring substrate 4 so as to attach them to thesubstrate frame 4 t.

[0589] Next, four suspension members 4 u supporting the substrate body 4a shown in FIG. 55(a) are cut so that the substrate body 4 a issupported in the substrate frame 4 t by the supporting members 3 j ofthe elastomer 3.

[0590] In other words, the substrate body 4 a of the thin film wiringsubstrate 4 shown in FIG. 55(c) is supported by the elastomer attachedto it.

[0591] As a result, the thin film wiring substrate 4 to which theelastomer 3 is attached is formed as shown in FIGS. 55(c), 55(d) andFIGS. 56(a) to 56(c).

[0592] Next, the electrode pads 1 b (FIG. 51) of the semiconductor chip1 are exposed by the openings 4 e of the thin film wiring substrate 4,and the main surface 1 a of the semiconductor chip 1 and the elastomer 3are joined.

[0593] In other words, the semiconductor chip 1 is attached to theelastomer 3 as shown in FIGS. 56(d) to 56(f).

[0594] Next, the electrode pads 1 b of the semiconductor chip 1 (FIG.51) and the corresponding leads 4 c of the thin film wiring substrate 4are electrically connected, as shown in FIG. 57(a).

[0595] Next, the resin sealing 28 (FIG. 4) of the electrode pads 1 b ofthe semiconductor chip 1 and the leads 4 c of the thin film wiringsubstrate 4 is performed by a potting method using sealing resin asshown in FIGS. 57(d) to 57(f) so as to form the sealing parts 5.

[0596] The resin sealing 28 may be performed also by the transfer moldmethod.

[0597] Next, a bump pole material is supplied to the bump openings 4 jof the substrate body 4 a, and the bump electrodes 2 are formed as shownin FIG. 58(a)-(c) by passing the assembly through a reflow furnace, notshown.

[0598] In this way, the wiring 4 d of the substrate body 4 a (FIG. 51 orFIG. 52) is electrically connected to the bump electrodes 2.

[0599] Next, the supporting members 3 j of the elastomer 3 are cut so asto separate them from the substrate frame 4 t of the substrate body 4 a,and the exposed parts 3 i (FIG. 58(e)) of the elastomer 3 formed by thecut supporting members 3 j, are thereby exposed.

[0600] Therefore, the CPS51 as shown in FIGS. 58(d) to 58(f) or FIG. 51can be produced.

[0601] The remaining features of the method of manufacture of the CSP51are identical to those of the CSP17 of the seventh embodiment, so theirdescription will not be repeated.

[0602] It will be understood that the techniques of the aforesaidfourteenth-twentieth embodiments may be applied also to the CSP51 of thetwenty-first embodiment.

[0603] The advantages of the CSP51 of the twenty-first embodiment and ofits method of manufacture are as follows.

[0604] If the internal pressure of the elastomer rises due to expansionof water vapor and gas during solder reflow when the bump electrodes areformed, this gas (vapor) can escape from the exposed parts 3 i of theelastomer 3 to the outside via a gas escape path 36 as shown in FIG.51(a) (gas can escape from any of the eight exposed parts 3 i).

[0605] In other words, gas can be released by the exposed parts 3 i ofthe elastomer 3.

[0606] The occurrence of the popcorn phenomenon wherein the sealing part5 is ruptured, is thereby prevented.

[0607] As a result, reliability of the CSP51 is improved.

[0608] The remaining advantages of the method of manufacture of theCSP51 according to the twenty-first embodiment are identical to those ofthe CSP17 of the seventh embodiment, so their description will not berepeated.

[0609] Embodiment 22

[0610] FIGS. 59(a) to 59(c) show examples of the structure of asemiconductor device according to a twenty-second embodiment. FIG. 59(a)is a side view, FIG. 59(b) is a plan view, FIG. 59(c) is a front view.

[0611] A CSP52 (semiconductor device) according to the twenty-secondembodiment is a peripheral pad type fan-in CSP as is the CSP51 of thetwenty-first embodiment shown in FIG. 51. It has a substantiallyidentical structure to that of the CSP51, however differences from theCSP51 of the twenty-first embodiment are that all of the side faces ofthe elastomer 3 (FIG. 51) are exposed in the side faces 52 a of theCSP52, as shown in FIG. 59.

[0612] In other words, in the CSP52, all the side faces of the elastomer3 are exposed as the exposed parts 3 i after manufacture is complete, asshown in FIG. 59(a).

[0613] The remaining features of the construction of the CSP52 accordingto the twenty-second embodiment are identical to those of the CSP51 ofthe twenty-first embodiment, so their description will not be repeated.

[0614] It will be understood that the techniques of the aforesaidfourteenth to twentieth embodiments may be applied also to the CSP52 ofthe twenty-second embodiment.

[0615] The advantages of the CSP52 of the twenty-second embodiment andof its method of manufacture are as follows.

[0616] In the CSP52, as the entire side faces of the elastomer 3 formthe exposed parts 3 i, the exposed surface area of the elastomer 3 isincreased.

[0617] Hence, the gas release effect due to the exposed areas 3 i of theelastomer 3 is enhanced.

[0618] As a result, the reliability of the CSP52 is further improved.

[0619] The remaining features of the CSP52 according to thetwenty-second embodiment and of its method of manufacture are identicalto those of the CSP52 of the twenty-second embodiment, so theirdescription will not be repeated.

[0620] Embodiment 23

[0621] FIGS. 60(a) to 60(d) are plan views each showing a typicalstructure of a semiconductor device according to a twenty-thirdembodiment of this invention. FIG. 60(a) is a plan view, FIG. 60(b) is aside view, FIG. 60(c) is a plan view, FIG. 60(d) is a front view. FIGS.61(a) to 61(b) are diagrams each showing an example of a state whensealing is complete in a method of manufacturing the semiconductordevice according to the twenty-third embodiment of this invention. FIG.61(a) is a plan view, FIG. 61(b) is a base plan view. FIGS. 62(a) to62(c) show cross-sections of the plan view shown in FIG. 61(a). FIGS.62(a) is a cross-sectional view through a line A-A, 62(b) is across-sectional view through a line B-B, 62(c) is a cross-sectional viewthrough a line C-C. FIGS. 63(a) to 63(c) are diagrams each showing anexample of a state when sealing is complete in a method of manufacturingthe semiconductor device according to the twenty-third embodiment ofthis invention. FIG. 63(a) is a plan view, FIG. 63(b) is a side view,FIG. 63(c) is a base plan view. FIG. 64 is a schematic diagram showingan example of a gas release state in the semiconductor device accordingto the twenty-third embodiment.

[0622] A CSP53 (semiconductor device) according to the twenty-thirdembodiment is a peripheral pad type fan-in CSP as is the CSP51 of thetwenty-first embodiment shown in FIG. 51. It has a substantiallyidentical structure to that of the CSP51, however differences from theCSP51 of the twenty-first embodiment are that the sealing parts 5 areformed only in the vicinity of the two ends of the semiconductor chip 1as shown in FIG. 60(a). Hence, the device comprises the exposed parts 3i corresponding to the entire side faces of the elastomer 3, and theexposed parts 3 i formed by exposing the area in the vicinity of thecenter on the left and right of the peripheral part on the top surfaceand under surface of the device, as shown in FIGS. 60(b), 60(c).

[0623] In other words, in the CSP53, the resin sealing 28 is notperformed over all the side faces 1 c of the semiconductor chip 1, butonly in the vicinity of the electrode pads 1 b (FIG. 51).

[0624] Herein, FIG. 61 and FIG. 62 show the structure obtained when theresin sealing 28 is complete in the process of manufacturing the CSP53.FIG. 61(a) shows a plan view, FIG. 61(b) is a base view seen from theunder surface.

[0625] The sealing parts 5 are formed on the short side faces 1 c of thesemiconductor chip 1 and at both ends of the long side faces 1 c, asshown in FIG. 61(b). As they are not formed in the vicinity of thecenter of the side faces 1 c, the areas in the vicinity of the center onthe left and right of the peripheral part of the top surface and undersurface of the elastomer 3 are exposed.

[0626] In the CSP53 according to the twenty-third embodiment, the shapeof the elastomer 3 is substantially identical to that of the tape basematerial 49, as shown in FIG. 61.

[0627] In other words, the shape of the elastomer 3 is made toeffectively fit that of the thin film wiring substrate 4 including theopenings 4 e, long holes 4 q and suspension members 4 u of the thin filmwiring substrate 4.

[0628]FIG. 63 shows the situation after resin sealing when thesuspension members 4 u of the thin film wiring substrate 4 andsuspension pieces 3 k of the elastomer 3 shown in FIG. 61 are cut so asto separate the substrate body 4 a from the substrate frame 4 t.

[0629] The remaining features of the CSP53 according to the twenty-thirdembodiment and of its method of manufacture are identical to those ofthe CSP51 of the twenty-first embodiment, so their description will notbe repeated.

[0630] It will be understood that the techniques of the aforesaidfourteenth-twentieth embodiments may be applied also to the CSP53 of thetwenty-third embodiment.

[0631] The advantages of the CSP53 of the twenty-third embodiment and ofits method of manufacture are as follows.

[0632] In the CSP53, the areas in the vicinity of the center on the leftand right of the peripheral part of the top surface and under surface ofthe elastomer 3 are exposed, and as the exposed surface area of theelastomer 3 is increased with the addition of the exposed parts 3 i atthe cut positions. Therefore, the gas release effect is further enhancedwhen gas escapes via the gas escape path 36 shown in FIG. 64.

[0633] Also, by forming the shape of the elastomer 3 substantially thesame as that of the tape base material 4 g, the strength of the thinfilm wiring substrate 4 in the CSP53 is increased. As a result, defectsin the CSP53 are reduced, and the yield is increased.

[0634] The remaining features of the CSP53 according to the twenty-thirdembodiment and of its method of manufacture are identical to those ofthe CSP51 of the twenty-first embodiment so their description will notbe repeated.

[0635] Embodiment 24

[0636] FIGS. 65(a) to 65(e) is a diagram of a typical structure of asemiconductor device according to a twenty-fourth embodiment of thisinvention. FIG. 65(a) is a base plan view, FIG. 65(b) is a side view,FIG. 65(c) is a plan view, FIG. 65(d) is a front view, FIG. 65(e) is asection through a line CC in (c).

[0637] A CSP54 (semiconductor device) according to the twenty-fourthembodiment is a peripheral pad type fan-in CSP as is the CSP51 of thetwenty-first embodiment shown in FIG. 51. It has a substantiallyidentical structure to that of the CSP51, however differences from theCSP51 of the twenty-first embodiment are that openings 4 v for exposingthe elastomer 3 are provided in the thin film wiring substrate 4 asshown in FIGS. 65(c), 65(e), and that there are no positions exposingthe elastomer 3 other than the openings 4 v as shown in FIG. 65.

[0638] In the CSP54 according to the twenty-fourth embodiment, the twoopenings 4 v are provided inside the substrate body 4 a of the thin filmwiring substrate 4.

[0639] As a result, when the CSP54 is assembled, the elastomer 3 isexposed via these openings 4 v.

[0640] Therefore, the exposed parts 3 i of the elastomer 3 are formed bythe openings 4 v.

[0641] In the CSP54, there are no positions exposing the elastomer 3other than the openings 4 v.

[0642] In other words, the resin sealing 28 is performed over all theside faces 1 c without exposing the side faces 1 c of the semiconductorchip 1 as shown in FIGS. 65(a) to 65(d).

[0643] In the CSP54 according to the twenty-fourth embodiment, theopenings 4 v are formed in the substrate body 4 a of the thin filmwiring substrate 4, and they may be formed at any position provided thatthe elastomer 3 is exposed after the CSP54 is assemble.

[0644] Moreover, there is no particular limitation on the number of theopenings 4 v.

[0645] The remaining features of the construction of the CSP54 accordingto the twenty-fourth embodiment and of its method of manufacture areidentical to those of the CSP51 of the twenty-first embodiment, so theirdescription will not be repeated.

[0646] It will be understood that the techniques of the aforesaidfourteenth-twentieth embodiments may be applied also to the CSP54 of thetwenty-fourth embodiment.

[0647] The advantages of the CSP54 of the twenty-fourth embodiment andof its method of manufacture are as follows.

[0648] In the CSP54, the resin sealing 28 is performed over all the sidefaces 1 c of the semiconductor chip 1, so the sealing properties of thesemiconductor chip 1 are improved.

[0649] As a result, defects in the semiconductor chip 1 are reduced, andthe reliability of the CSP54 is improved.

[0650] Also, as the openings 4 v are provided in the thin film wiringsubstrate 4, gas can be released via these openings 4 v even when theresin sealing 28 is performed over all the side faces 1 c of thesemiconductor chip 1.

[0651] Therefore, gas release from the elastomer 3 is enhanced while thesealing properties of the semiconductor chip 1 are improved.

[0652] The remaining advantages of the method of manufacture of theCSP54 according to the twenty-fourth embodiment are identical to thoseof the CSP51 of the twenty-first embodiment, so their description willnot be repeated.

[0653] Embodiment 25

[0654] FIGS. 66(a) to 66(c) are diagrams of a typical structure of asemiconductor device according to a twenty-fifth embodiment of thisinvention. FIG. 66(a) is a plan view, FIG. 66(b) is a side view, FIG.66(c) is a base plan view. FIG. 67 is a partial plan view showing anexample of a sealing completion state in a method of manufacturing thesemiconductor device according to the twenty-fifth embodiment of thisinvention. FIGS. 68(a) and 68(b) are views showing cross-sectionsthrough the partial plan view shown in FIG. 67. FIG. 68(a) is across-section through the line A-A, FIG. 68(b) is a cross-sectionthrough the line B-B. FIGS. 69(a) and 69(b) are partial plan views eachshowing an example of a sealing completion state in a method ofmanufacturing the semiconductor device according to the twenty-fifthembodiment of this invention. FIG. 69(a) is a base plan view, FIG. 69(b)is a base plan view of a state with the semiconductor chip removed. FIG.70 is a schematic diagram showing an example of a gas release state in asemiconductor device according to the twenty-fifth embodiment of thisinvention.

[0655] A CSP55 (semiconductor device) according to the twenty-fifthembodiment is a structure where in pads are formed on the chipperiphery, and the pad electrodes 1 b are formed both inside and outsidethe chip as shown in FIG. 66. Hereafter, this type of CSP will bereferred to as a fan-in/fan-out CSP. Differences from the CSP51 of thetwenty-first embodiment are that electrode pads 1 b are provided on theperiphery of the four sides of the main surface 1 a of the semiconductorchip 1, and the bump electrodes 2 which are external terminals arearranged inside (substrate body 4 a) and outside (substrate protrudingparts 4 b) the semiconductor chip 1.

[0656] The CSP55 comprises an elastomer 3 comprising the exposed parts 3i for exposing the electrode pads 1 b (connection terminals) arranged onthe main surface 1 a of the semiconductor chip 1, and the elastomerprotruding parts 3 b (elastic structure protruding parts) which protrudebeyond the periphery of the semiconductor chip 1, the thin film wiringsubstrate 4 comprising the substrate body 4 a provided with the wiring 4d whereof one end is electrically connected to the electrode pads 1 bvia the leads 4 c (FIG. 51) and the other end is electrically connectedto the bump electrodes 2, and the substrate protruding parts 4 bprovided with the openings 4 e for exposing the electrode pads 1 b (FIG.51), these protruding parts protruding beyond the openings 4 e and thesemiconductor chip 1, and the sealing parts 5 for sealing the electrodepads 1 b of the semiconductor chip 1 and the leads 4 c of the thin

[0657] film wiring substrate 4. The thin film wiring substrate 4 and theelastomer 3 are formed in approximately the same size, and the bumpelectrodes 2 are provided in the substrate body 4 a.

[0658] Therefore, in the CSP55, the thin film wiring substrate 4comprises the substrate protruding parts 4 b formed in a one-piececonstruction with the substrate body 4 a and its outer periphery, thebump electrodes 2 being provided in these substrate protruding parts 4 boutside the semiconductor chip 1.

[0659]FIG. 67 to FIG. 69 show the structure of the CSP55 when the resinsealing 28 is complete. FIG. 67 is a plan view, FIG. 68 is across-sectional view, FIG. 69(a) is a base plan view seen from the undersurface, and FIG. 69(b) is a view of the tape base material 4 g seenfrom the under surface through the semiconductor chip 1.

[0660] The substrate body 4 a and substrate protruding parts 4 b areconnected and supported by the suspension members 4 u of the four anglepieces of the substrate body 4 a, via the four openings 4 e (FIG. 68(a))formed in the outer periphery of the substrate body 4 a.

[0661] In the outer periphery of the substrate protruding parts 4 b, thefour long holes 4 q used for cutting are formed, and the substrateprotruding parts 4 b are supported in the substrate frame 4 t by thesuspension members 4 u of the four angle pieces.

[0662] The elastomer 3 of the twenty-fifth embodiment is formed with ashape substantially fitting that of the substrate body 4 a and substrateprotruding parts 4 b in the thin film wiring substrate 4 shown in FIG.67, as shown in FIG. 69(a).

[0663] Therefore, the elastomer protruding parts 3 b are provided whichare supported by the suspension pieces 3 k (FIG. 69(b)) and formed withessentially the same shape as that of the substrate protruding parts 4b, and the four openings 3 c are formed with effectively the same sizeas that of the four openings 4 e of the thin film wiring substrate.

[0664] The sealing parts 5 are formed only in the four openings 4 e ofthe thin film wiring substrate 4, i.e. in the vicinity of the electrodepads 1 b of the semiconductor chip 1, as shown in FIG. 68(a).

[0665] Therefore when assembly is complete, in the CSP55 which is afan-in/fan-out structure, all points on the under surface of theelastomer 3 excluding those covered by the semiconductor chip 1(elastomer protruding parts 3 b) and all of the side faces 1 a areexposed to form the exposed parts 3 i, as shown in FIGS. 66(b), 66(c).

[0666]FIG. 66 shows the state where, after resin sealing, thesemiconductor device is cut in the suspension members 4 u of the anglepieces of the substrate protruding parts 4 b of the thin film wiringsubstrate 4 shown in FIG. 67 so as to separate the substrate body 4 aand substrate protruding parts 4 b from

[0667] the substrate frame 4 t.

[0668] The remaining features of the construction of the CSP55 accordingto the twenty-fifth embodiment are identical to those of the CSP51 ofthe twenty-first embodiment, so their description will not be repeated.

[0669] The method of manufacturing the CSP55 according to thetwenty-fifth embodiment will now be described.

[0670] First, the substrate body 4 a comprising the wiring 4 d and thesubstrate protruding parts 4 b on its outer periphery are formed, theelastomer 3 which has effectively the same shape as that of thesubstrate protruding parts 4 b and substrate body 4 a is joined to it,and the thin film wiring substrate 4 comprising the openings 4 ecomprising the leads 4 c joined to the wiring 4 d is prepared.

[0671] Next, the main surface 1 a of the semiconductor chip 1 and theelastomer 3 are joined so as to expose the electrode pads 1 b (FIG. 51)of the semiconductor chip 1 in the openings 4 e of the thin film wiringsubstrate 4.

[0672] The electrode pads 1 b of the semiconductor chip 1 areelectrically connected to the corresponding leads 4 c of the thin filmwiring substrate 4.

[0673] Next, the resin sealing 28 is applied to the electrode pads 1 bof the semiconductor chip 1 and the leads 4 c of the thin film wiringsubstrate 4 to form the sealing parts 5.

[0674] The state of the device when sealing is complete is shown in FIG.67, FIG. 68 and FIG. 69.

[0675] Next, the bump electrodes 2 are formed in the substrate body 4 aand substrate protruding parts 4 b so that they are electricallyconnected to the wiring 4 d.

[0676] The four suspension members 4 u in the outer angle pieces of thesubstrate protruding parts 4 b shown in FIG. 67 are cut so that thesubstrate body 4 a and substrate protruding parts 4 b are separated fromthe substrate frame 4 t.

[0677] The state of the device when cutting is complete is shown inFIGS. 66(a), 66(b), 66(c).

[0678] The remaining features of the method of manufacturing the CSP55according to the twenty-fifth embodiment are identical to those of theCSP51 of the twenty-first embodiment, so their description will not berepeated.

[0679] It will be understood that the techniques of the aforesaidfourteenth-twentieth embodiments may be applied also to the CSP55 of thetwenty-fifth embodiment.

[0680] The advantages of the CSP55 of the twenty-fifth embodiment and ofits method of manufacture are as follows.

[0681] In the CSP55, even in a fan-in/fan-out structure, gas (vapor) canbe released via the gas escape path 36 through the suspension members 3k (FIG. 69(b)) provided in the elastomer 3 as shown in FIG. 70.

[0682] The occurrence of the popcorn phenomenon which damages thesealing part 5 is thereby prevented, and as a result the reliability ofthe CSP55 is improved.

[0683] The remaining features of the CSP55 according to the twenty-fifthembodiment and of its method of manufacture are identical to those ofthe CSP51 of the twenty-first embodiment, so their description will notbe repeated.

[0684] This invention has been described in detail based on thefirst-twenty-fifth embodiments, however the invention is not limited tothese twenty-five embodiments and various modifications are possiblewithin the scope and spirit of the invention.

[0685] For example in the first to twenty-fifth embodiments, thespecifications of the components shown in FIGS. 3(a, b, c, d) and theprocess conditions shown in FIG. 5 are only examples of optimumconditions, and the invention is not necessarily limited to the examplesshown in FIGS. 3(a, b, c, d) and FIG. 5.

[0686] Further, in the aforesaid first to twenty-fifth embodiments, thecase was described where the semiconductor chip 1 was longitudinal, butthe semiconductor chip 1 may also be square.

[0687] The electrode pads 1 b provided in the semiconductor chip 1 arenot necessarily located at the two ends of the semiconductor chip 1, andmay be provided in any other position provided that this position issituated on the outer periphery of the main surface 1 a of thesemiconductor chip 1. They may for example be provided over the whole ofthe outer periphery.

[0688] The number of the electrode pads 1 b and the number of bumpelectrodes 2 provided in the semiconductor chip 1 is not limited to 12or 20, and may be a number less than 12, 13-19 or more than 20.

[0689] The shape of the openings 4 e of the thin film wiring substrate 4and the openings 3 c of the elastomer 3 is not limited to rectangular,and may be another shape provided that the electrode pads 1 b of thesemiconductor chip 1 can be exposed.

[0690] The semiconductor device (CSP) described in the aforesaidfirst-twenty-fifth embodiments may be used for example in a DRAM(Dynamic Random Access Memory), S (Synchronous) DRAM, S (Static) RAM,RAMBUS, flash memory, ASIC (Application Specific IC), CPU (CentralProcessing Unit) or gate array. Typical applications of these devicesare modules and cards, but it will be understood that they may beapplied to products other than modules and cards.

[0691] The main advantages of the invention as disclosed herein may besimply described as follows.

[0692] (1) As the substrate body and substrate protruding parts of thethin film wiring substrate in the semiconductor device (CSP) are formedin a one-piece construction, the substrate protruding-parts are notformed independently and therefore do not have to be formed of costlymaterials. This lowers the cost of manufacturing the semiconductordevice.

[0693] (2) By providing the substrate protruding parts outside theopenings in the thin film wiring substrate, when a sealing resin isapplied via the openings, the sealing parts are formed as a bridgebetween the substrate protruding parts and the semiconductor chip. Inthis way, a stable seal can be obtained, sealing properties areimproved, and consequently humidity resistance is improved.

[0694] (3) When the bump electrodes are formed, even if thesemiconductor device absorbs is subjected to reflow after it absorbsmoisture, water vapor produced during reflow can be released to theoutside via the elastic structure as the side faces in a predetermineddirection of the elastic structure are exposed to the outside, andreflow tolerance is thereby improved.

[0695] (4) By forming the elastic structure of a porous fluoride resin,the water vapor produced during ref low can be released to the outsideand at the same time, penetration of moisture into the semiconductordevice is prevented by the water repelling properties of the fluorideresin. As a result, deterioration of the electrical characteristics ofthe semiconductor device is reduced.

[0696] (5) By incorporating a coloring agent in the elastic structure,transmittance of light in the elastic structure can be reduced withoutaffecting the basic physical properties of the elastic structure. Inthis way, the circuit of the semiconductor chip

[0697] can be shielded from light, ultraviolet light which would causeincorrect operation of the semiconductor chip is blocked, andoperational stability of the electrical circuit of the semiconductordevice is improved.

[0698] (6) In the thin film wiring substrate, by making the connectionsbetween the wiring and bump lands wide, concentration of stress in theconnections is prevented. Hence, even if the wiring deforms due tothermal contraction and expansion together with the tape base materialduring temperature cycles, rupture of leads is prevented in theconnecting parts 4 s between the wiring and bump lands.

[0699] (7) By forming the exposed parts in the elastic structure, evenwhen the internal pressure of the elastic structure rises as duringreflow for example, gas can be released to the outside from the exposedparts of the elastic structure. In this way, occurrence of the popcornphenomenon which damages the sealing parts, etc., is prevented, and as aresult the reliability of the semiconductor device is improved.

What is claimed is:
 1. A method of manufacturing a semiconductor devicecomprising the steps of: preparing a semiconductor chip includingsemiconductor elements on a main surface thereof and a plurality ofconnection terminals, said plurality of connection terminals beingarranged on the periphery of said semiconductor chip; preparing a thinfilm substrate comprising a substrate body made of an insulating tape,openings and a plurality of leads thereof; preparing an elastic bodymade of a porous material and joining said elastic body to said thinfilm substrate; joining said semiconductor chip at said main surfacethereof to said elastic body while permitting said connection terminalsof said semiconductor chip to remain exposed from said openings of saidthin film substrate; electrically connecting said connection terminalsof said semiconductor chip to first ends of corresponding ones of saidleads, respectively; sealing said connection terminals of saidsemiconductor chip and said first ends of said leads by means of asealing resin, so as to expose a part of a side surface of said elasticbody; and forming a plurality of bump electrodes on opposing, secondends of said leads, respectively.
 2. A method of manufacturing asemiconductor device according to claim 1, wherein each of saidinsulating tape and said elastic body comprises a first part arrangedwithin a plan view area covered by said semiconductor chip and a secondpart protruding beyond said openings, the second part preventing theflow of said sealing resin at said sealing step.
 3. A method ofmanufacturing a semiconductor device according to claim 2, wherein inthe step of joining said elastic body and said semiconductor chip, saidsemiconductor chip is pressed into said elastic body such that thethickness of said first part of said elastic body is made smaller thanthat of said second part of said elastic body.
 4. A method ofmanufacturing a semiconductor device according to claim 1, wherein thestep of preparing said elastic body further includes providing saidelastic body with supporting members, said supporting members beingseparated from that part of said elastic body joined to saidsemiconductor chip so as not to cover said connection terminals of saidsemiconductor chip.
 5. A method of manufacturing a semiconductor deviceaccording to claim 4, further comprising the step of: after the step ofsealing, simultaneously cutting said insulating tape and said elasticbody.
 6. A method of manufacturing a semiconductor device according toclaim 4, wherein in the step of sealing, said sealing resin being usedcomprises not more than 50% of silica.
 7. A method of manufacturing asemiconductor device according to claim 3, further comprising the stepof: after the step of sealing, simultaneously cutting said insulatingtape and said elastic body.
 8. A method of manufacturing a semiconductordevice according to claim 3, wherein in the step of sealing, saidsealing resin being used comprises not more than 50% of silica.
 9. Amethod of manufacturing a semiconductor device according to claim 1,further comprising the step of: after the step of sealing,simultaneously cutting said insulating tape and said elastic body.
 10. Amethod of manufacturing a semiconductor device according to claim 1,wherein in the step of sealing, said sealing resin being used comprisesnot more than 50% of silica.